Four-stage pipelined RV32I/RV32F RISC-V SoC for the PYNQ-Z1, with a custom FPU, UART boot, and on-chip memories. Simulation to bitstream.
cpu fpga processor verilog vivado computer-architecture pynq risc-v rv32i pipelined-processor floating-point-unit
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Updated
May 25, 2026 - Verilog