The Modular System for Acceleration Integration (MoSAIC) is a multi-tiled architecture for accurate and fast exploration of message driven computation.

• MoSAIC is written in SystemVerilog.
• A tile can house a lightweight RISC-V processor such as the PicoRV32 or a generic accelerator.
• The tiles are connected through a light-weight network on chip (NoC) following an AXIStream protocol.
• Each tile has a hardware message queue for inter-tile communication used for message driven computation.
• A RISC-V ISA extension enables straight access to the physical message queue or remote memory through C/C++ primitives (qPut, qGet, qWait, qPoll, mPut, mGet).
• Partitioned global address scheme (PGAS).

For Icarus Verilog

• iverilog (at least version 11)
• vpp
• RV32 Toolchain for systems that involve the PicoRV32 processor. Follow: https://github.com/YosysHQ/picorv32

P38 heterogeneous multi-tiled system with support for message queues (MoSAIC) Copyright (c) 2024, The Regents of the University of California, through Lawrence Berkeley National Laboratory (subject to receipt of any required approvals from the U.S. Dept. of Energy). All rights reserved.

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