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Add RISC-V board Bananapi BPI-F3 (SpacemiT K1 SoC) BSP Support #531

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Add RISC-V board Bananapi BPI-F3 (SpacemiT K1 SoC) BSP Support #531
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eclipse-threadx:devfrom
akifejaz:bananapi-f3

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@akifejaz akifejaz commented May 15, 2026

Add RISC-V supervisor support to the rv64/gnu port and provide a complete board support package for the BananaPi BPI-F3 (SpacemiT K1 SoC, X60 cores).

Port changes (risc-v64/gnu):

  • Guard all CSR accesses with TX_RISCV_SMODE to select S-mode registers
    (sstatus/sepc/sie/sret) vs M-mode (mstatus/mepc/mie/mret) in
    context_save, context_restore, schedule, system_return,
    interrupt_control, and stack_build.
  • Add S-mode TX_INT_ENABLE/TX_DISABLE and inline TX_RESTORE macros
    to tx_port.h.
  • Add TX_RISCV_SMODE CMake option to CMakeLists.txt.

BananaPi BPI-F3 BSP (example_build/bananapi-f3):

  • Boot flow: FSBL → OpenSBI (M-mode) → U-Boot (S-mode) → ThreadX
  • S-mode trap handler with context save/restore integration
  • SBI legacy ecall timer at 10 Hz (24 MHz timebase)
  • PLIC driver with S-mode context, stale-IRQ drain, and callbacks
  • PXA-compatible UART0 console (115200 8N1)

Tested on risc-v board, BananaPi BPI-F3 hardware.

Build and Test

Get your BPI-F3 board and Flash it normally as the process mentioned in BPI/Getting Started.

In order to build, use the following commands:

cd ~/threadx/ports/risc-v64/gnu/example_build/bananapi-f3
bash build_libthreadx.sh

This should produce kernel.elf and kernel.bin

--

  1. On reboot press "s" key, this should stop normal boot process and stop at U-Boot shell.
  2. at this load the kernel.bin or kernel.elf using the following commands
tftpboot ${loadaddr} kernel.elf && bootelf ${loadaddr} 
OR
tftpboot ${loadaddr} kernel.bin && go ${loadaddr}
  1. This should load the threadx build for bpi-f3 and start running it.
  2. On succesfull execution you can see the demo_threadx.c logs over UART.
=> setenv ipaddr 192.168.10.2
=> setenv serverip 192.168.10.5
=> setenv netmask 255.255.255.0
=> setenv gatewayip 192.168.1.1
=> setenv tftpblocksize 1024
=> savenv
=> saveenv
Saving Environment to MMC... Writing to MMC(2)... OK
=> [  53.930] tftpboot 0x200000 kernel.bin
ethernet@cac80000 Waiting for PHY auto negotiation to complete... done
[  57.566] emac_adjust_link link:1 speed:100 duplex:full
[  57.588] Using ethernet@cac80000 device
[  57.589] TFTP from server 192.168.10.5; our IP address is 192.168.10.2
Filename 'kernel.bin'.
Load address: 0x200000
Loading: *�####
	 [  57.881] 117.2 KiB/s
done
Bytes transferred = 33750 (83d6 hex)
=> [  62.468] go 0x200000
## Startin[uart] UART0 @ 0xD4017000 initialized (115200n8)
[Thread] : thread_0_entry is here!
[Thread] : thread_5_entry is here!
[Thread] : thread_3_and_4_entry is here!
[Thread] : thread_3_and_4_entry is here!
[Thread] : thread_6_and_7_entry is here!
[Thread] : thread_6_and_7_entry is here!
[Thread] : thread_1_entry is here!
[Thread] : thread_1_entry is here!
[Thread] : thread_1_entry is here!
[Thread] : thread_1_entry is here!
[Thread] : thread_1_entry is here!
[Thread] : thread_1_entry is here!
[Thread] : thread_1_entry is here!
[Thread] : thread_1_entry is here!
[Thread] : thread_1_entry is here!
[Thread] : thread_1_entry is here!
[Thread] : thread_1_entry is here!
[Thread] : thread_1_entry is here!
[Thread] : thread_1_entry is here!
[Thread] : thread_1_entry is here!
[Thread] : thread_1_entry is here!
[Thread] : thread_1_entry is here!
..
..

Add RISC-V supervisor support to the rv64/gnu port and
provide a complete board support package for the BananaPi BPI-F3
(SpacemiT K1 SoC, X60 cores).

Port changes (risc-v64/gnu):
- Guard all CSR accesses with TX_RISCV_SMODE to select S-mode registers
  (sstatus/sepc/sie/sret) vs M-mode (mstatus/mepc/mie/mret) in
  context_save, context_restore, schedule, system_return,
  interrupt_control, and stack_build.
- Add S-mode TX_INT_ENABLE/TX_DISABLE and inline TX_RESTORE macros
  to tx_port.h.
- Add TX_RISCV_SMODE CMake option to CMakeLists.txt.

BananaPi BPI-F3 BSP (example_build/bananapi-f3):
- Boot flow: FSBL → OpenSBI (M-mode) → U-Boot (S-mode) → ThreadX
- S-mode trap handler with context save/restore integration
- SBI legacy ecall timer at 10 Hz (24 MHz timebase)
- PLIC driver with S-mode context, stale-IRQ drain, and callbacks
- PXA-compatible UART0 console (115200 8N1)
- Linker script at 0x200000 load address

Tested on risc-v board, BananaPi BPI-F3 hardware.

Signed-off-by: Akif Ejaz <[email protected]>
@akifejaz akifejaz marked this pull request as ready for review May 15, 2026 11:33
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