[Deepin-Kernel-SIG] [linux 6.6.y] arm64/haoc: use raw PTE helpers for IEE mappings#2000
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Reviewer's GuideThis PR updates the HAOC/IEE arm64 page table manipulation code to use the raw PTE helpers (__set_pte and __ptep_get) instead of the public contpte-aware helpers, so that kernel/IEE mappings can safely preserve and manipulate PTE_CONT and other attributes without unintended aggregation or stripping by the user-mapping helpers. Flow diagram for iee_set_logical_mem PTE update using raw helpersflowchart TD
A[iee_set_logical_mem] --> B[ptep = pte_offset_kernel]
B --> C[pte = __ptep_get ptep]
C --> D{prot ?}
D -->|true| E[set PTE_RDONLY,
clear PTE_DBM in pte]
D -->|false| F[clear PTE_RDONLY in pte]
E --> G[__set_pte ptep pte]
F --> G[__set_pte ptep pte]
G --> H[next ptep / addr]
H -->|loop over order| C
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deepin inclusion category: bugfix Commit 69cbff5 ("arm64/mm: wire up PTE_CONT for user mappings") made the public arm64 PTE helpers contpte-aware. In particular, set_pte() strips PTE_CONT before storing a PTE and ptep_get() may aggregate the access/dirty state of an entire contiguous range. That is right for core-mm user mappings, but HAOC/IEE edits kernel and IEE page tables directly and deliberately installs or removes PTE_CONT on those mappings. Routing those updates through the public helpers silently drops the contiguous bit and can warn when rewriting existing contiguous mappings. Use the raw arm64 helpers, __set_pte() and __ptep_get(), for HAOC/IEE PTE updates and reads, matching the private-helper usage in the arm64 kernel and hugetlb paths. Keep the existing explicit WRITE_ONCE() and barrier sequences unchanged. Assisted-by: Codex:gpt-5.5:xhigh Fixes: 69cbff5 ("arm64/mm: wire up PTE_CONT for user mappings") Signed-off-by: Wentao Guan <[email protected]>
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Pull request overview
This PR fixes HAOC/IEE’s direct page-table edits on arm64 to avoid contpte-aware public helpers that strip PTE_CONT and may warn when rewriting contiguous mappings. It updates HAOC/IEE to use the raw PTE accessors so contiguous-bit semantics are preserved when manipulating kernel/IEE page tables directly.
Changes:
- Replace
set_pte()with__set_pte()in HAOC/IEE PTE update paths to avoid strippingPTE_CONT. - Replace
ptep_get()/ open-codedREAD_ONCE(*ptep)reads with__ptep_get()for raw, non-aggregating PTE reads in IEE page-table logic. - Keep the existing explicit
WRITE_ONCE()and barrier/TLB sequences intact while changing only the PTE accessor layer.
Reviewed changes
Copilot reviewed 3 out of 3 changed files in this pull request and generated no comments.
| File | Description |
|---|---|
| arch/arm64/kernel/haoc/iee/iee-token.c | Switch token mapping PTE reads/writes to raw helpers to preserve PTE_CONT. |
| arch/arm64/kernel/haoc/iee/iee-mmu.c | Use raw PTE helpers during fixmap PTE initialization and safety checks. |
| arch/arm64/kernel/haoc/iee/iee-func.c | Use raw helpers across logical-mem protection, IEE address validity toggles, and contiguous-bit clearing paths. |
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amjac27
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LGTM. 此外,在后续 CONFIG_PTP 的设计里,我们会显示将 set_pte 设置为 __set_pte 的别名;将 __ptep_get 设置为 READ_ONCE 的别名。
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/approve 看了一下这个修改,在ARM64_CONTPTE未使能时这里的修改也是安全的。 |
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[APPROVALNOTIFIER] This PR is APPROVED This pull-request has been approved by: Avenger-285714 The full list of commands accepted by this bot can be found here. The pull request process is described here DetailsNeeds approval from an approver in each of these files:
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deepin inclusion
category: bugfix
Commit 69cbff5 ("arm64/mm: wire up PTE_CONT for user mappings") made the public arm64 PTE helpers contpte-aware. In particular, set_pte() strips PTE_CONT before storing a PTE and ptep_get() may aggregate the access/dirty state of an entire contiguous range.
That is right for core-mm user mappings, but HAOC/IEE edits kernel and IEE page tables directly and deliberately installs or removes PTE_CONT on those mappings. Routing those updates through the public helpers silently drops the contiguous bit and can warn when rewriting existing contiguous mappings.
Use the raw arm64 helpers, __set_pte() and __ptep_get(), for HAOC/IEE PTE updates and reads, matching the private-helper usage in the arm64 kernel and hugetlb paths. Keep the existing explicit WRITE_ONCE() and barrier sequences unchanged.
Assisted-by: codex:gpt-5.5:xhigh
Fixes: 69cbff5 ("arm64/mm: wire up PTE_CONT for user mappings")
Summary by Sourcery
Bug Fixes: