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Fix silent bit-truncation in ift_rom_mem.sv taint preload - #3

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copilot/silent-bit-truncation-fix
May 31, 2026
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Fix silent bit-truncation in ift_rom_mem.sv taint preload#3
flaviens merged 2 commits into
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copilot/silent-bit-truncation-fix

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Copilot AI commented May 31, 2026

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The SIMROMTAINT preload path in cellift/src/ift_rom_mem.sv wrote each 32-bit taint word into a 1-bit slice of mem_taints, silently dropping bits [31:1]. As a result, any taint mask with bit 0 cleared was discarded, making ROM instruction-fetch taint a no-op despite the loader reporting success via $display.

Root cause

mem_taints is a one-dimensional associative array of 32-bit (Width) entries, but the assignment indexed it with [taint_id], producing a single-bit target. SystemVerilog assigned only word[0] and dropped the rest.

Change

  • Replace the 1-bit slice assignment with a full 32-bit OR, matching the correct behavior already used in ift_sram_mem.sv:
// before
mem_taints[((section_addr-AddrOffset)/WidthBytes+i)/NumBanks][taint_id] = word;
// after
mem_taints[((section_addr-AddrOffset)/WidthBytes+i)/NumBanks] |= word;

With this, the entire 32-bit mask (e.g. 0x01F00000) is preserved and propagates through rdata_t0 / instr_rdata_t0 as expected.

Copilot AI changed the title [WIP] Fix silent bit-truncation in ift_rom_mem.sv taint preload Fix silent bit-truncation in ift_rom_mem.sv taint preload May 31, 2026
Copilot AI requested a review from flaviens May 31, 2026 12:12
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flaviens marked this pull request as ready for review May 31, 2026 12:17
Copilot AI review requested due to automatic review settings May 31, 2026 12:17
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Fixes #2 thanks for raising!

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Silent bit-truncation in cellift/src/ift_rom_mem.sv taint preload

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