v1.2.0

v1.2.0 — ONNX/TensorRT export hardening, benchmark throughput controls, and torch-agnostic builds

This release hardens the ONNX/TensorRT export path, adds throughput controls and a bounded memory bank to the benchmarks, and makes editable installs robust across mixed torch/CUDA environments. It also lands a meaningful per-frame speedup in the ONNX image encoder.

Features

• Override the autocast half dtype. Callers can now force fp16 or bf16 via _half_dtype instead of relying on the capability-based default — useful when the auto-selected precision doesn't match your hardware or accuracy needs.
• Benchmark throughput knobs. The torch benchmark gains --cudnn-benchmark (autotune cuDNN convs for the fixed input shape) and --channels-last (NHWC conv stacks).
• Bounded "forgetful" memory bank. New --forgetful / --memory-window flags cap the memory bank size for long-video throughput measurement.
• Reject mixed-precision ONNX exports on TensorRT, where they are unsupported — failing early instead of producing an invalid engine.

Performance

• ~22 ms/frame faster ONNX image encoder. Position encodings depend only on input resolution, not frame content, so they are now computed once and cached per resolution rather than re-bound as ~87 MiB of graph outputs every frame. This eliminates per-frame re-materialization on the TensorRT/CUDA execution providers. Output masks are bit-for-bit unchanged.

Bug Fixes

• Torch-agnostic editable metadata. Editable sam2 installs no longer bake the build-time torch version into their metadata, which previously caused unsatisfiable solves or silent CPU fallbacks when a pixi environment used a different torch line than the one present at build time.
• Fail loud on unsupported TensorRT bf16. ONNX export now errors clearly on TensorRT bf16 with onnxruntime < 1.23 instead of emitting a broken model.

Developer Experience

• Unified benchmark CLI. The torch and ONNX benchmarks now share one CLI and timing loop, so flags and results are directly comparable. Benchmark scripts moved to tools/.
• Reproducible CI. setup-pixi is pinned to v0.59.0 and runs frozen against the committed lock, so CI can't silently re-solve or rewrite it.
• Dropped unused mask-decoder conv params and refreshed pixi.lock.

Documentation

• Added a benchmarks section to the README with a throughput table across the SAM 2.1 and EfficientTAM variants (torch bf16 / ONNX).

⚠️ Breaking Changes

• ONNX "fp16" export renamed to "mixed-precision". Update any export commands or scripts that referenced the old fp16 naming. The new naming better reflects that some blocks stay in fp32 for numerical safety.

Full Changelog: v1.1.2...v1.2.0

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ONNX block exports

Per model, two zips hold the 5 SAM2 blocks (image encoder, prompt encoder, mask
decoder, memory attention, memory encoder). Both target opset 18 with attention
and RoPE fully decomposed: the native opset-23 ONNX Attention / RotaryEmbedding
ops break on the ONNX Runtime TensorRT EP (Attention falls back to CUDA → heavy
subgraph fragmentation; dynamic RoPE fails the engine build with a myelin error).

• <model>-opset18.zip — decomposed RoPE (rotate-half) + SDPA primitives, fp32.
  Portable: runs on onnxruntime >= 1.17 (CPU / CUDA / TensorRT EP), CUDA 11/12/13.
• <model>-opset18-mixed-precision.zip — same graphs baked to mixed precision
  for the CUDA / CPU EP only (those EPs can't convert precision at runtime).
  Only the two heavy blocks (image encoder, memory attention) run fp16; the prompt
  encoder, mask decoder and memory encoder stay fp32 — not because those blocks are
  individually fp16-unsafe (each is — mask IoU 1.0), but because running ALL blocks
  fp16 compounds in the recurrent memory loop and loses the masklet (mask IoU ~0).
  Do not use this zip on TensorRT (the baked fp16 + cast islands break the
  engine build). For TensorRT use the fp32 zip with bf16 (fp32 range, safe on all
  blocks; Ampere+) or fp16 (applied to the 2 heavy blocks only).

v1.1.2

ONNX block exports

Per model, two zips hold the 5 SAM2 blocks (image encoder, prompt encoder, mask
decoder, memory attention, memory encoder). Both target opset 18 with attention
and RoPE fully decomposed: the native opset-23 ONNX Attention / RotaryEmbedding
ops break on the ONNX Runtime TensorRT EP (Attention falls back to CUDA → heavy
subgraph fragmentation; dynamic RoPE fails the engine build with a myelin error).

• <model>-opset18.zip — decomposed RoPE (rotate-half) + SDPA primitives, fp32.
  Portable: runs on onnxruntime >= 1.17 (CPU / CUDA / TensorRT EP), CUDA 11/12/13.
• <model>-opset18-fp16.zip — same graphs converted to mixed precision for the
  CUDA/CPU EP (which can't convert precision at runtime). Only the two heavy blocks
  (image encoder, memory attention) run fp16; the prompt encoder, mask decoder and
  memory encoder stay fp32. Not because those blocks are individually fp16-unsafe
  (each is — mask IoU 1.0), but because running ALL blocks fp16 compounds in the
  recurrent memory loop and loses the masklet (mask IoU ~0); 2-block fp16 is safe.
  For full-precision-speed everywhere, use the fp32 zip on TensorRT with bf16
  (bf16's fp32 range survives all-blocks; Ampere+).

v1.1.1

ONNX block exports

Per model, two zips hold the 5 SAM2 blocks (image encoder, prompt encoder, mask
decoder, memory attention, memory encoder). Both target opset 18 with attention
and RoPE fully decomposed: the native opset-23 ONNX Attention / RotaryEmbedding
ops break on the ONNX Runtime TensorRT EP (Attention falls back to CUDA → heavy
subgraph fragmentation; dynamic RoPE fails the engine build with a myelin error).

• <model>-opset18.zip — decomposed RoPE (rotate-half) + SDPA primitives, fp32.
  Portable: runs on onnxruntime >= 1.17 (CPU / CUDA / TensorRT EP), CUDA 11/12/13.
• <model>-opset18-fp16.zip — same graphs converted to mixed precision for the
  CUDA/CPU EP (which can't convert precision at runtime). Only the two heavy blocks
  (image encoder, memory attention) run fp16; the prompt encoder, mask decoder and
  memory encoder stay fp32. Not because those blocks are individually fp16-unsafe
  (each is — mask IoU 1.0), but because running ALL blocks fp16 compounds in the
  recurrent memory loop and loses the masklet (mask IoU ~0); 2-block fp16 is safe.
  For full-precision-speed everywhere, use the fp32 zip on TensorRT with bf16
  (bf16's fp32 range survives all-blocks; Ampere+).

v1.1.0

v1.1.0: ONNX/TensorRT runtime package, export script, benchmark examples

v1.0.7

chore: bump version to 1.0.7

v1.0.6

chore: bump version to 1.0.6

v1.0.5

chore: bump version to 1.0.5

v1.0.4

Merge branch 'develop'