CS undergraduate at IIT Hyderabad interested in systems, compilers, computer architecture, and Machine Learning.
- Optimizing LLM inference
- RISC-V tooling and simulator
- xv6 kernel extensions
- Operating Systems
- Compilers
- Computer Architecture
- Machine Learning Systems
- Performance Engineering
Browser-based RISC-V assembler, disassembler, simulator and debugger with cache simulation, pipeline hazard detection, and WebAssembly integration.
Extended xv6 by implementing MLFQ scheduling, virtual memory optimizations, RAID simulation, and disk scheduling in xv6.
Extended an OCaml compiler with exception handling support across lexer, parser, Abstract Syntax Tree, typechecker, and runtime stages.
Investigated FPU-assisted integer acceleration in Gem5 using instruction-level parallelism and performance analysis.
- LinkedIn: https://www.linkedin.com/in/krishnan-r-iith/
- LeetCode: https://leetcode.com/u/rmuk/
- Codeforces: https://codeforces.com/profile/muk_r1