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ggml-cuda: add dequant-float matvec (mmvdq) for Q4_K/Q5_K/Q6_K on RDN… #61

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ggml-cuda: add dequant-float matvec (mmvdq) for Q4_K/Q5_K/Q6_K on RDN… #61

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e2624bb
ggml-cuda: add dequant-float matvec (mmvdq) for Q4_K/Q5_K/Q6_K on RDN…
Jul 19, 2026
488afd1
GGML_CUDA_DQ_ROWS env parsing hardened, Row bounds guard
Jul 22, 2026
fe04f5c
Remove the guard break
Jul 25, 2026
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34 changes: 34 additions & 0 deletions ggml/src/ggml-cuda/ggml-cuda.cu
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Original file line number Diff line number Diff line change
Expand Up @@ -36,6 +36,7 @@
#include "ggml-cuda/mmq.cuh"
#include "ggml-cuda/mmvf.cuh"
#include "ggml-cuda/mmvq.cuh"
#include "ggml-cuda/mmvdq.cuh"
#include "ggml-cuda/norm.cuh"
#include "ggml-cuda/opt-step-adamw.cuh"
#include "ggml-cuda/opt-step-sgd.cuh"
Expand Down Expand Up @@ -1790,6 +1791,22 @@ static void ggml_cuda_mul_mat(ggml_backend_cuda_context & ctx, const ggml_tensor
ggml_cuda_mul_mat_f(ctx, src0, src1, nullptr, dst);
return;
}
// GGML_CUDA_DQ_Q6K (unset = arch default, 0 = off, non-zero = on).
const bool dq_default = GGML_CUDA_CC_IS_RDNA3_5(cc);
if (ggml_cuda_dq_mmv_enabled(dq_default) && ne11 == 1
&& (src0->type == GGML_TYPE_Q4_K || src0->type == GGML_TYPE_Q5_K
|| (src0->type == GGML_TYPE_Q6_K && ggml_cuda_dq_q6k_enabled(dq_default)))
&& ggml_is_contiguous(src0) && ggml_is_contiguous(src1) && ggml_is_contiguous(dst)
&& ne02 == 1 && ne03 == 1 && ne12 == 1 && ne13 == 1 && src0->ne[0] % QK_K == 0) {
if (src0->type == GGML_TYPE_Q4_K) {
ggml_cuda_mul_mat_vec_dq_q4_K(ctx, src0, src1, dst);
} else if (src0->type == GGML_TYPE_Q5_K) {
ggml_cuda_mul_mat_vec_dq_q5_K(ctx, src0, src1, dst);
} else {
ggml_cuda_mul_mat_vec_dq_q6_K(ctx, src0, src1, dst);
}
return;
}
if (ggml_cuda_should_use_mmvq(src0->type, cc, ne11)) {
ggml_cuda_mul_mat_vec_q(ctx, src0, src1, nullptr, dst);
return;
Expand Down Expand Up @@ -3578,6 +3595,23 @@ static int ggml_cuda_try_fuse(ggml_backend_cuda_context * cuda_ctx, ggml_cgraph
}

if (ggml_cuda_should_fuse_mul_mat_vec_q(up)) {
const bool dq_default = GGML_CUDA_CC_IS_RDNA3_5(ggml_cuda_info().devices[cuda_ctx->device].cc);
if (ggml_cuda_dq_mmv_enabled(dq_default) && ids == nullptr
&& ggml_get_glu_op(glu) == GGML_GLU_OP_SWIGLU
&& (src0->type == GGML_TYPE_Q4_K || src0->type == GGML_TYPE_Q5_K
|| (src0->type == GGML_TYPE_Q6_K && ggml_cuda_dq_q6k_enabled(dq_default)))
&& gate->src[0]->type == src0->type && ggml_are_same_shape(src0, gate->src[0])
&& src1->type == GGML_TYPE_F32 && glu->type == GGML_TYPE_F32
&& src1->ne[1] == 1 && src0->ne[0] % QK_K == 0
&& ggml_is_contiguous(src0) && ggml_is_contiguous(gate->src[0])
&& ggml_is_contiguous(src1) && ggml_is_contiguous(glu)
&& src0->ne[2] == 1 && src0->ne[3] == 1 && src1->ne[2] == 1 && src1->ne[3] == 1) {
ggml_cuda_mul_mat_vec_dq_glu(*cuda_ctx, src0, gate->src[0], src1, glu);
fused_mul_mat_vec = true;
fused_node_count = 3;
break;
}

ggml_cuda_mm_fusion_args_host fusion_data{};
fusion_data.gate = gate->src[0];
fusion_data.glu_op = ggml_get_glu_op(glu);
Expand Down
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