GPU programming with HIP

Course material for the CSC course "GPU programming with HIP". The course is part of the EuroCC training activities at CSC.

Agenda

Day 1

Time	Topic
09:00–09:15	Welcome, LUMI access, slurm, git, web interface (JE)
09:15-09:30	What is CSC?
09:30–09:45	Break/debugging access
09:45–10:30	Introduction to GPU's and GPU programming (JK)
10:30–10:45	Break
10:45-11:30	Basic usage, memory allocation and kernels (JK)
11:30-11:45	Break
11:45-12:15	Exercises
12:15-13:00	Lunch
13:00-13:45	Basic usage cont. (JK)
13:45-14:00	Break
14:00-14:30	Exercises
14:30-15:15	Analyzing simple traces (JK)
15:15-15:30	Break
15:30-16:00	Exercises
16:00-16:15	Day summary

Day 2

Time	Topic
09:00–09:30	Day 1 Recap (LS)
09:30–10:15	More advanced memory allocation/access (LS)
10:00–10:15	Break
10:15–10:45	Exercises
10:45-11:30	Streams and events (LS)
11:30-11:45	Break
11:45-12:15	Exercises
12:15-13:00	Lunch
13:00-13:45	More advanced synchronization (LS)
13:45-14:00	Break
14:00-14:45	Exercises
14:45-15:00	Lead-up to access patterns and optimizations (LS)
14:45-15:45	Break & Exercises
15:45-16:00	Close-up

Day 3

Time	Topic
09:00–10:00	Kernel optimizations (JE)
10:00–10:15	Break
10:15–10:45	Exercises
10:45-11:30	Shared local memory (JE)
11:30-11:45	Break
11:45-12:15	Exercises
12:15-13:00	Lunch
13:00-13:30	HOP and performance portability (JE)
13:30-13:45	Break
13:45-14:15	Exercises
14:15-14:45	Multi-GPU programming (JE)
14:45-15:45	Break & Exercises
15:45-16:00	Close-up

Slides

Link to slides

First steps

• Which technologies have you used?
• First steps

Exercises

General instructions

Introduction and GPU kernels

• Mental model quiz
• Hello world
• Error checking
• Kernel saxpy
• Kernel copy2d

Tracing kernels

• Using rocprofv3
• Tracing saxpy kernel

Streams, events, and synchronization

• Understanding asynchronity using events
• Investigating streams and events

Memory allocations, access, and unified memory

• Memory management strategies
• The stream-ordered memory allocator and memory pools
• Unified memory and structs

Fortran and HIP

• SAXPY
• HIPRAND

Optimization

• Coalescing
• Matrix Transpose
• Tracing

Multi-GPU programming and HIP+MPI

• Peer to peer device access
• Vector sum on two GPUs without MPI
• Ping-pong with multiple GPUs and MPI

Porting to HIP

• Converting Tools & Portability

Bonus

• Heat equation with HIP