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[PyTorch] Add pad_between_seqs support for non-CP and CP (A2A and P2P) with FA3 + THD (varlen) Lint #17356: Pull request #2596 synchronize by sudhakarsingh27
3m 6s sudhakarsingh27:flash_attn_pad_bw_seqs
sudhakarsingh27:flash_attn_pad_bw_seqs
3m 6s
[PyTorch] Add pad_between_seqs support for non-CP and CP (A2A and P2P) with FA3 + THD (varlen) License #16732: Pull request #2596 synchronize by sudhakarsingh27
17s sudhakarsingh27:flash_attn_pad_bw_seqs
sudhakarsingh27:flash_attn_pad_bw_seqs
17s
[PyTorch] Add pad_between_seqs support for non-CP and CP (A2A and P2P) with FA3 + THD (varlen) Build #17311: Pull request #2596 synchronize by sudhakarsingh27
In progress sudhakarsingh27:flash_attn_pad_bw_seqs
sudhakarsingh27:flash_attn_pad_bw_seqs
In progress
[PyTorch] Add pad_between_seqs support for non-CP and CP (A2A and P2P) with FA3 + THD (varlen) Documentation #16734: Pull request #2596 synchronize by sudhakarsingh27
2m 18s sudhakarsingh27:flash_attn_pad_bw_seqs
sudhakarsingh27:flash_attn_pad_bw_seqs
2m 18s
[PyTorch] Add pad_between_seqs support for non-CP and CP (A2A and P2P) with FA3 + THD (varlen) License #16731: Pull request #2596 synchronize by sudhakarsingh27
15s sudhakarsingh27:flash_attn_pad_bw_seqs
sudhakarsingh27:flash_attn_pad_bw_seqs
15s
[PyTorch] Add pad_between_seqs support for non-CP and CP (A2A and P2P) with FA3 + THD (varlen) Build #17310: Pull request #2596 synchronize by sudhakarsingh27
1m 16s sudhakarsingh27:flash_attn_pad_bw_seqs
sudhakarsingh27:flash_attn_pad_bw_seqs
1m 16s
[PyTorch] Add pad_between_seqs support for non-CP and CP (A2A and P2P) with FA3 + THD (varlen) Documentation #16733: Pull request #2596 synchronize by sudhakarsingh27
1m 5s sudhakarsingh27:flash_attn_pad_bw_seqs
sudhakarsingh27:flash_attn_pad_bw_seqs
1m 5s
[PyTorch] Add pad_between_seqs support for non-CP and CP (A2A and P2P) with FA3 + THD (varlen) Lint #17355: Pull request #2596 synchronize by sudhakarsingh27
1m 10s sudhakarsingh27:flash_attn_pad_bw_seqs
sudhakarsingh27:flash_attn_pad_bw_seqs
1m 10s
[JAX] Utilize preswizzled inputs in GroupedGemm TE-CI Trigger #9679: Issue comment #2470 (comment) created by jberchtold-nvidia
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[JAX] Utilize preswizzled inputs in GroupedGemm Blossom-CI #9708: Issue comment #2470 (comment) created by jberchtold-nvidia
1s
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Implement row-scaled NVFP4 fprop recipe Blossom-CI #9707: Issue comment #2931 (comment) created by timmoon10
2s
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Implement row-scaled NVFP4 fprop recipe TE-CI Trigger #9678: Issue comment #2931 (comment) created by timmoon10
3m 27s
3m 27s
[Common/PyTorch/JAX] make offset of ClampedSwiGLU configurable License #16730: Pull request #2938 synchronize by vthumbe1503
8s hxbai:swiglu_offset
hxbai:swiglu_offset
8s
[Common/PyTorch/JAX] make offset of ClampedSwiGLU configurable Lint #17354: Pull request #2938 synchronize by vthumbe1503
2m 21s hxbai:swiglu_offset
hxbai:swiglu_offset
2m 21s
[Common/PyTorch/JAX] make offset of ClampedSwiGLU configurable Build #17309: Pull request #2938 synchronize by vthumbe1503
In progress hxbai:swiglu_offset
hxbai:swiglu_offset
In progress
[Common/PyTorch/JAX] make offset of ClampedSwiGLU configurable Documentation #16732: Pull request #2938 synchronize by vthumbe1503
1m 21s hxbai:swiglu_offset
hxbai:swiglu_offset
1m 21s
[JAX][Common] Enable cuDNN fused attn backend for NO_MASK + bidirecti… Deploy nightly docs #1717: Commit 4b6923d pushed by KshitijLakhani
2m 22s main
main
2m 22s
[JAX][Common] Enable cuDNN fused attn backend for NO_MASK + bidirectional SWA Blossom-CI #9706: Issue comment #2961 (comment) created by KshitijLakhani
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[JAX][Common] Enable cuDNN fused attn backend for NO_MASK + bidirectional SWA TE-CI Trigger #9677: Issue comment #2961 (comment) created by KshitijLakhani
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Implement row-scaled NVFP4 fprop recipe Blossom-CI #9705: Issue comment #2931 (comment) created by zianglih
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Implement row-scaled NVFP4 fprop recipe TE-CI Trigger #9676: Issue comment #2931 (comment) created by zianglih
1s
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[JAX] Optimize materialized attn mask to consume O(N) memory instead of O(N*N) Blossom-CI #9704: Issue comment #2700 (comment) created by KshitijLakhani
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[JAX] Optimize materialized attn mask to consume O(N) memory instead of O(N*N) TE-CI Trigger #9675: Issue comment #2700 (comment) created by KshitijLakhani
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[Common][PyTorch] Fix int32 overflow and -1 sentinel handling in moe_permute TE-CI Trigger #9674: Issue comment #2907 (comment) created by tdophung
3m 29s
3m 29s
[Common][PyTorch] Fix int32 overflow and -1 sentinel handling in moe_permute Blossom-CI #9703: Issue comment #2907 (comment) created by tdophung
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