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smp: Allow switching the boot (primary) CPU core#563

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jannau wants to merge 3 commits intoAsahiLinux:mainfrom
jannau:switch_boot_cpu
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smp: Allow switching the boot (primary) CPU core#563
jannau wants to merge 3 commits intoAsahiLinux:mainfrom
jannau:switch_boot_cpu

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@jannau
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@jannau jannau commented Apr 16, 2026

M3 and later Apple silicon SoCs start m1n1 on the first perfomance core.
The cluster layout remained unchanged with an efficiency core cluster
first. This causes an annoying but mostly cosmetic issue in Linux. Linux
assigns CPU index 0 to the boot CPU. This results in a mismatch of
logical and physical CPU core order. As seen with the Radxa Orion O6
this will at least generate support questions but is also annoying for
CPU pinning. It's likely to result in pinning to mixture of performance
and efficiency cores.
While functionality it should not matter to which secondary CPU core
control is passed the only expected use case is switching to CPU core 0.

@jannau jannau requested a review from svenpeter42 as a code owner April 16, 2026 17:34
It will be used to switch to CPU 0 on M3 and later to avoid confusion
when Linux is not started with CPU 0.

Signed-off-by: Janne Grunau <[email protected]>
Comment thread src/proxy.c Outdated
jannau added 2 commits April 17, 2026 22:15
M3 and later Apple silicon SoCs start m1n1 on the first perfomance core.
The cluster layout remained unchanged with an efficiency core cluster
first. This causes an annoying but mostly cosmetic issue in Linux. Linux
assigns CPU index 0 to the boot CPU. This results in a mismatch of
logical and physical CPU core order. As seen with the Radxa Orion O6
this will at least generate support questions but is also annoying for
CPU pinning. It's likely to result in pinning to mixture of performance
and efficiency cores.
While functionality it should not matter to which secondary CPU core
control is passed the only expected use case is switching to CPU core 0.

Signed-off-by: Janne Grunau <[email protected]>
@jannau
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jannau commented Apr 17, 2026

I've seen now some unhandled exceptions after switching the boot CPU during DT preparation so it's possible that there is something missing during initialisation of the new boot CPU

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