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11 changes: 10 additions & 1 deletion proxyclient/m1n1/hv/__init__.py
Original file line number Diff line number Diff line change
Expand Up @@ -1786,7 +1786,16 @@ def remove_oslog(node):
continue
addr, size = cpu.cpu_impl_reg
print(f" {cpu.name}: [0x{addr:x}] = 0x{rvbar:x}")
self.p.write64(addr, rvbar)

val = p.read64(addr)
locked = val & 1
do_write = val & 0xfffffffff000 != rvbar
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I think

if val & ~0xfff != rvbar:
    if val & 1:
        raise Exception(f"RVBAR for {cpu.name} is locked but differs from entry point")

    p.write64(addr, rvbar)

is easier to follow than the ifs with two booleans. print(f" {cpu.name}: [0x{addr:x}] = 0x{rvbar:x}") should stay directly above the write.

Not sure if we shouldn't just drop this. I think this is a leftover from old times before we updated in-place


if locked and do_write:
raise Exception("RVBAR is locked and does not already contain start address")

if do_write:
p.write64(addr, rvbar)

def _load_macho_symbols(self):
self.symbol_dict = self.macho.symbols
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11 changes: 10 additions & 1 deletion proxyclient/tools/chainload.py
Original file line number Diff line number Diff line change
Expand Up @@ -100,7 +100,16 @@ def remove_oslog(node):
continue
addr, size = cpu.cpu_impl_reg
print(f" {cpu.name}: [0x{addr:x}] = 0x{rvbar:x}")
p.write64(addr, rvbar)

val = p.read64(addr)
locked = val & 1
do_write = val & 0xfffffffff000 != rvbar
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same here


if locked and do_write:
raise Exception("RVBAR is locked and does not already contain start address")

if do_write:
p.write64(addr, rvbar)

u.push_adt()

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1 change: 1 addition & 0 deletions src/smp.c
Original file line number Diff line number Diff line change
Expand Up @@ -267,6 +267,7 @@ void smp_start_secondaries(void)
break;
case T8112:
case T8122:
case T8132:
cpu_start_off = CPU_START_OFF_T8112;
break;
case T6020:
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