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[Vulkan] Use the uniform texel buffer type for Buffer SRV (#1041)
We had `VK_DESCRIPTOR_TYPE_STORAGE_TEXEL_BUFFER` for the `Buffer` type, but for SRVs we need `VK_DESCRIPTOR_TYPE_UNIFORM_TEXEL_BUFFER`. Fixes #1030
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4 files changed

Lines changed: 165 additions & 8 deletions

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‎lib/API/VK/Device.cpp‎

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@@ -66,6 +66,7 @@ static VkFormat getVKFormat(DataFormat Format, int Channels) {
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static VkDescriptorType getDescriptorType(const ResourceKind RK) {
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switch (RK) {
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case ResourceKind::Buffer:
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return VK_DESCRIPTOR_TYPE_UNIFORM_TEXEL_BUFFER;
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case ResourceKind::RWBuffer:
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return VK_DESCRIPTOR_TYPE_STORAGE_TEXEL_BUFFER;
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case ResourceKind::Texture2D:

‎test/Feature/TypedBuffer/64bit-scalar.test‎

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@@ -125,8 +125,8 @@ DescriptorSets:
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# UNSUPPORTED: Metal
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# Bug https://github.com/llvm/offload-test-suite/issues/1030
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# XFAIL: Vulkan && !AMD
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# Bug https://github.com/llvm/offload-test-suite/issues/1110
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# XFAIL: Intel && Vulkan && DXC
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# REQUIRES: Int64
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# RUN: split-file %s %t

‎test/Feature/TypedBuffer/GetDimensions.test‎

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@@ -81,12 +81,7 @@ DescriptorSets:
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#--- end
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# Bug https://github.com/llvm/offload-test-suite/issues/469
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# GetDimensions on Vulkan (DXC) returns [ 16, 16 ] instead of [ 8, 5 ]
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# except on AMD https://github.com/llvm/offload-test-suite/issues/523
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# XFAIL: DXC && Vulkan && !Darwin && !AMD
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# Unimplemented https://github.com/llvm/llvm-project/issues/164008
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# XFAIL: Clang && Vulkan
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# XFAIL: DXC && Vulkan && Intel
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# RUN: split-file %s %t
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# RUN: %dxc_target -T cs_6_5 -Fo %t.o %t/source.hlsl

‎test/Tools/Offloader/BufferFormats.test‎

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#--- source.hlsl
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Buffer<int4> In0 : register(t0);
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RWBuffer<int4> Out0 : register(u1);
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StructuredBuffer<int4> In1 : register(t2);
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RWStructuredBuffer<int4> Out1 : register(u3);
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Buffer<float4> In2 : register(t4);
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RWBuffer<float4> Out2 : register(u5);
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StructuredBuffer<float4> In3 : register(t6);
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RWStructuredBuffer<float4> Out3 : register(u7);
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[numthreads(1,1,1)]
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void main() {
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Out0[0] = In0[0];
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Out1[0] = In1[0];
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Out2[0] = In2[0];
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Out3[0] = In3[0];
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}
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//--- pipeline.yaml
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---
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Shaders:
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- Stage: Compute
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Entry: main
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DispatchSize: [1, 1, 1]
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Buffers:
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- Name: In0
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Format: Int32
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Channels: 4
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Data: [ 1, 2, 3, 4 ]
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- Name: Out0
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Format: Int32
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Channels: 4
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FillSize: 16
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- Name: ExpectedOut0
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Format: Int32
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Channels: 4
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Data: [ 1, 2, 3, 4 ]
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- Name: In1
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Format: Int32
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Channels: 4
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Data: [ 1, 2, 3, 4 ]
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- Name: Out1
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Format: Int32
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Channels: 4
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FillSize: 16
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- Name: ExpectedOut1
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Format: Int32
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Channels: 4
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Data: [ 1, 2, 3, 4 ]
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- Name: In2
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Format: Float32
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Channels: 4
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Data: [ 1.0, 2.0, 3.0, 4.0 ]
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- Name: Out2
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Format: Float32
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Channels: 4
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FillSize: 16
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- Name: ExpectedOut2
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Format: Float32
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Channels: 4
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Data: [ 1.0, 2.0, 3.0, 4.0 ]
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- Name: In3
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Format: Float32
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Channels: 4
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Data: [ 1.0, 2.0, 3.0, 4.0 ]
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- Name: Out3
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Format: Float32
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Channels: 4
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FillSize: 16
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- Name: ExpectedOut3
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Format: Float32
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Channels: 4
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Data: [ 1.0, 2.0, 3.0, 4.0 ]
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Results:
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- Result: Test0
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Rule: BufferExact
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Actual: Out0
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Expected: ExpectedOut0
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- Result: Test1
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Rule: BufferExact
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Actual: Out1
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Expected: ExpectedOut1
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- Result: Test2
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Rule: BufferExact
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Actual: Out2
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Expected: ExpectedOut2
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- Result: Test3
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Rule: BufferExact
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Actual: Out3
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Expected: ExpectedOut3
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DescriptorSets:
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- Resources:
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- Name: In0
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Kind: Buffer
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DirectXBinding:
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Register: 0
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Space: 0
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VulkanBinding:
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Binding: 0
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- Name: Out0
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Kind: RWBuffer
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DirectXBinding:
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Register: 1
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Space: 0
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VulkanBinding:
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Binding: 1
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- Name: In1
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Kind: StructuredBuffer
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DirectXBinding:
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Register: 2
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Space: 0
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VulkanBinding:
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Binding: 2
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- Name: Out1
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Kind: RWStructuredBuffer
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DirectXBinding:
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Register: 3
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Space: 0
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VulkanBinding:
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Binding: 3
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- Name: In2
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Kind: Buffer
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DirectXBinding:
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Register: 4
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Space: 0
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VulkanBinding:
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Binding: 4
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- Name: Out2
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Kind: RWBuffer
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DirectXBinding:
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Register: 5
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Space: 0
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VulkanBinding:
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Binding: 5
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- Name: In3
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Kind: StructuredBuffer
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DirectXBinding:
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Register: 6
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Space: 0
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VulkanBinding:
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Binding: 6
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- Name: Out3
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Kind: RWStructuredBuffer
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DirectXBinding:
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Register: 7
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Space: 0
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VulkanBinding:
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Binding: 7
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...
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#--- end
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# Bug https://github.com/llvm/offload-test-suite/issues/351
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# XFAIL: Metal
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# Bug https://github.com/llvm/llvm-project/issues/193620
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# XFAIL: WARP && Clang
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# RUN: split-file %s %t
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# RUN: %dxc_target -T cs_6_5 -Fo %t.o %t/source.hlsl
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# RUN: %offloader --validation-layer %t/pipeline.yaml %t.o

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