diff --git a/EMR/metrics/emeraldrapids_metrics.json b/EMR/metrics/emeraldrapids_metrics.json index 84031d9a..aec8a6c9 100644 --- a/EMR/metrics/emeraldrapids_metrics.json +++ b/EMR/metrics/emeraldrapids_metrics.json @@ -2,8 +2,8 @@ "Header": { "Copyright": "Copyright (c) 2001 - 2026 Intel Corporation. All rights reserved.", "Info": "Performance Monitoring Metrics for 5th Generation Intel(R) Xeon(R) Processor Scalable Family0", - "DatePublished": "06/02/2026", - "Version": "1.3", + "DatePublished": "07/09/2026", + "Version": "1.4", "Legend": "", "TmaVersion": "5.2", "TmaFlavor": "Full" @@ -1053,6 +1053,132 @@ "ResolutionLevels": "CHA, SOCKET, SYSTEM", "MetricGroup": "" }, + { + "MetricName": "llc_miss_local_memory_bandwidth_read", + "LegacyName": "metric_llc_miss_local_memory_bandwidth_read_MB/s", + "Level": 1, + "BriefDescription": "Bandwidth (MB/sec) of read requests that miss the last level cache (LLC) and go to local memory", + "UnitOfMeasure": "", + "Events": [ + { + "Name": "UNC_CHA_REQUESTS.READS_LOCAL", + "Alias": "a" + } + ], + "Constants": [], + "Formula": "(a * 64 / 1000000) / DURATIONTIMEINSECONDS", + "Category": "", + "ResolutionLevels": "CHA, SOCKET, SYSTEM", + "MetricGroup": "" + }, + { + "MetricName": "llc_miss_local_memory_bandwidth_write", + "LegacyName": "metric_llc_miss_local_memory_bandwidth_write_MB/s", + "Level": 1, + "BriefDescription": "Bandwidth (MB/sec) of write requests that miss the last level cache (LLC) and go to local memory", + "UnitOfMeasure": "", + "Events": [ + { + "Name": "UNC_CHA_REQUESTS.WRITES_LOCAL", + "Alias": "a" + } + ], + "Constants": [], + "Formula": "(a * 64 / 1000000) / DURATIONTIMEINSECONDS", + "Category": "", + "ResolutionLevels": "CHA, SOCKET, SYSTEM", + "MetricGroup": "" + }, + { + "MetricName": "llc_miss_remote_memory_bandwidth_read", + "LegacyName": "metric_llc_miss_remote_memory_bandwidth_read_MB/s", + "Level": 1, + "BriefDescription": "Bandwidth (MB/sec) of read requests that miss the last level cache (LLC) and go to remote memory", + "UnitOfMeasure": "", + "Events": [ + { + "Name": "UNC_CHA_REQUESTS.READS_REMOTE", + "Alias": "a" + } + ], + "Constants": [], + "Formula": "(a * 64 / 1000000) / DURATIONTIMEINSECONDS", + "Category": "", + "ResolutionLevels": "CHA, SOCKET, SYSTEM", + "MetricGroup": "" + }, + { + "MetricName": "llc_miss_remote_memory_bandwidth_write", + "LegacyName": "metric_llc_miss_remote_memory_bandwidth_write_MB/s", + "Level": 1, + "BriefDescription": "Bandwidth (MB/sec) of write requests that miss the last level cache (LLC) and go to remote memory", + "UnitOfMeasure": "", + "Events": [ + { + "Name": "UNC_CHA_REQUESTS.WRITES_REMOTE", + "Alias": "a" + } + ], + "Constants": [], + "Formula": "(a * 64 / 1000000) / DURATIONTIMEINSECONDS", + "Category": "", + "ResolutionLevels": "CHA, SOCKET, SYSTEM", + "MetricGroup": "" + }, + { + "MetricName": "upi_data_receive_bw", + "LegacyName": "metric_UPI Data receive BW (MB/sec) (only data)", + "Level": 1, + "BriefDescription": "Intel(R) Ultra Path Interconnect (UPI) data receive bandwidth (MB/sec)", + "UnitOfMeasure": "", + "Events": [ + { + "Name": "UNC_UPI_RxL_FLITS.ALL_DATA", + "Alias": "a" + } + ], + "Constants": [], + "Formula": "(a * (64 / 9.0) / 1000000) / DURATIONTIMEINSECONDS", + "Category": "", + "ResolutionLevels": "UPI, SOCKET, SYSTEM", + "MetricGroup": "" + }, + { + "MetricName": "iio_bandwidth_read", + "LegacyName": "metric_IIO_bandwidth_read (MB/sec)", + "Level": 1, + "BriefDescription": "Bandwidth observed by the integrated I/O traffic controller (IIO) of IO reads that are initiated by end device controllers that are requesting memory from the CPU", + "UnitOfMeasure": "", + "Events": [ + { + "Name": "UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.ALL_PARTS", + "Alias": "a" + } + ], + "Constants": [], + "Formula": "(a * 4 / 1000000) / DURATIONTIMEINSECONDS", + "Category": "", + "ResolutionLevels": "IIO, SOCKET, SYSTEM", + "MetricGroup": "" + }, + { + "MetricName": "iio_bandwidth_write", + "LegacyName": "metric_IIO_bandwidth_write (MB/sec)", + "Level": 1, + "BriefDescription": "Bandwidth observed by the integrated I/O traffic controller (IIO) of IO writes that are initiated by end device controllers that are writing memory to the CPU", + "UnitOfMeasure": "", + "Events": [ + { + "Name": "UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.ALL_PARTS", + "Alias": "a" + } + ], + "Constants": [], + "Formula": "(a * 4 / 1000000) / DURATIONTIMEINSECONDS", + "Category": "", + "ResolutionLevels": "IIO, SOCKET, SYSTEM", + "MetricGroup": "" + }, { "MetricName": "io_bandwidth_read_l3_miss", "LegacyName": "metric_IO_bandwidth_read_L3_miss (MB/sec)", @@ -9895,7 +10021,7 @@ } ], "Formula": "100 * ( 1 - ( max( 0 , ( a / ( b + c + d + a ) ) - ( e / ( b + c + d + a ) ) ) ) / ( ( ( ( f + max( g - h , 0 ) ) / ( i ) * ( j - k ) / ( i ) ) * ( i ) + ( l + ( d / ( b + c + d + a ) ) * m ) ) / ( i ) if ( n < ( j - k ) ) else ( l + ( d / ( b + c + d + a ) ) * m ) / ( i ) ) if ( max( 0 , ( a / ( b + c + d + a ) ) - ( e / ( b + c + d + a ) ) ) ) < ( ( ( ( f + max( g - h , 0 ) ) / ( i ) * ( j - k ) / ( i ) ) * ( i ) + ( l + ( d / ( b + c + d + a ) ) * m ) ) / ( i ) if ( n < ( j - k ) ) else ( l + ( d / ( b + c + d + a ) ) * m ) / ( i ) ) else 1 ) if ( 1 - o / p if smt_on else 0 ) > 0.5 else 0", - "BaseFormula": "100 * ( 1 - tma_core_bound / tma_ports_utilization if tma_core_bound < tma_ports_utilization else 1 ) if tma_info_system_smt_2t_utilization > 0.5 else 0", + "BaseFormula": "100 * ( 1 - tma_core_bound / tma_ports_utilization if tma_core_bound < tma_ports_utilization else 1 ) if tma_info_system _smt_2t_utilization > 0.5 else 0", "Category": "TMA", "CountDomain": "Metric", "Threshold": { diff --git a/EMR/metrics/perf/emeraldrapids_metrics_perf.json b/EMR/metrics/perf/emeraldrapids_metrics_perf.json index 571aed06..87714ea4 100644 --- a/EMR/metrics/perf/emeraldrapids_metrics_perf.json +++ b/EMR/metrics/perf/emeraldrapids_metrics_perf.json @@ -305,6 +305,55 @@ "MetricName": "io_bandwidth_write_remote", "ScaleUnit": "1MB/s" }, + { + "BriefDescription": "Bandwidth (MB/sec) of read requests that miss the last level cache (LLC) and go to local memory", + "MetricExpr": "( UNC_CHA_REQUESTS.READS_LOCAL * 64 / 1000000 ) / duration_time", + "MetricGroup": "", + "MetricName": "llc_miss_local_memory_bandwidth_read", + "ScaleUnit": "1MB/s" + }, + { + "BriefDescription": "Bandwidth (MB/sec) of write requests that miss the last level cache (LLC) and go to local memory", + "MetricExpr": "( UNC_CHA_REQUESTS.WRITES_LOCAL * 64 / 1000000 ) / duration_time", + "MetricGroup": "", + "MetricName": "llc_miss_local_memory_bandwidth_write", + "ScaleUnit": "1MB/s" + }, + { + "BriefDescription": "Bandwidth (MB/sec) of read requests that miss the last level cache (LLC) and go to remote memory", + "MetricExpr": "( UNC_CHA_REQUESTS.READS_REMOTE * 64 / 1000000 ) / duration_time", + "MetricGroup": "", + "MetricName": "llc_miss_remote_memory_bandwidth_read", + "ScaleUnit": "1MB/s" + }, + { + "BriefDescription": "Bandwidth (MB/sec) of write requests that miss the last level cache (LLC) and go to remote memory", + "MetricExpr": "( UNC_CHA_REQUESTS.WRITES_REMOTE * 64 / 1000000 ) / duration_time", + "MetricGroup": "", + "MetricName": "llc_miss_remote_memory_bandwidth_write", + "ScaleUnit": "1MB/s" + }, + { + "BriefDescription": "Intel(R) Ultra Path Interconnect (UPI) data receive bandwidth (MB/sec)", + "MetricExpr": "( UNC_UPI_RxL_FLITS.ALL_DATA * ( 64 / 9.0 ) / 1000000 ) / duration_time", + "MetricGroup": "", + "MetricName": "upi_data_receive_bw", + "ScaleUnit": "1MB/s" + }, + { + "BriefDescription": "Bandwidth observed by the integrated I/O traffic controller (IIO) of IO reads that are initiated by end device controllers that are requesting memory from the CPU", + "MetricExpr": "( UNC_IIO_DATA_REQ_OF_CPU.MEM_READ.ALL_PARTS * 4 / 1000000 ) / duration_time", + "MetricGroup": "", + "MetricName": "iio_bandwidth_read", + "ScaleUnit": "1MB/s" + }, + { + "BriefDescription": "Bandwidth observed by the integrated I/O traffic controller (IIO) of IO writes that are initiated by end device controllers that are writing memory to the CPU", + "MetricExpr": "( UNC_IIO_DATA_REQ_OF_CPU.MEM_WRITE.ALL_PARTS * 4 / 1000000 ) / duration_time", + "MetricGroup": "", + "MetricName": "iio_bandwidth_write", + "ScaleUnit": "1MB/s" + }, { "BriefDescription": "Bandwidth of inbound IO reads that are initiated by end device controllers that are requesting memory from the CPU and miss the L3 cache", "MetricExpr": "( UNC_CHA_TOR_INSERTS.IO_MISS_PCIRDCUR * 64 / 1000000 ) / duration_time", diff --git a/mapfile.csv b/mapfile.csv index 5171b322..c3c1b877 100644 --- a/mapfile.csv +++ b/mapfile.csv @@ -146,7 +146,7 @@ GenuineIntel-6-8F,V1.3,/SPR/metrics/sapphirerapids_metrics.json,metrics,,, GenuineIntel-6-CF,V1.24,/EMR/events/emeraldrapids_core.json,core,,, GenuineIntel-6-CF,V1.24,/EMR/events/emeraldrapids_uncore.json,uncore,,, GenuineIntel-6-CF,V1.24,/EMR/events/emeraldrapids_uncore_experimental.json,uncore experimental,,, -GenuineIntel-6-CF,V1.3,/EMR/metrics/emeraldrapids_metrics.json,metrics,,, +GenuineIntel-6-CF,V1.4,/EMR/metrics/emeraldrapids_metrics.json,metrics,,, GenuineIntel-6-6A,V1.30,/ICX/events/icelakex_core.json,core,,, GenuineIntel-6-6A,V1.30,/ICX/events/icelakex_uncore.json,uncore,,, GenuineIntel-6-6A,V1.30,/ICX/events/icelakex_uncore_experimental.json,uncore experimental,,,