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FR: Design Rule Checks #58

@Paebbels

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@Paebbels
ERROR: [DRC MDRV-1]Multi-driven net
CRITICAL WARNING: [DRC NSTD-1] I/O port using DEFAULT IOSTANDARD instead of explicit assignment
CRITICAL WARNING: [DRC AVAL-46] MMCM/PLL VCO frequency out of range
WARNING: [DRC DPIP-1] DSP input pipelining not used
WARNING: [DRC DPOP-1] DSP PREG output pipelining not used
WARNING: [DRC DPOP-2] DSP MREG output pipelining not used
WARNING: [DRC RTSTAT-10] No routable loads
WARNING: [DRC REQP-1839] RAMB36 async control check
WARNING: [DRC REQP-1840] RAMB36 async control check
WARNING: [DRC REQP-181] BRAM write-first synchronous clocking
WARNING: [DRC LOCE-1] Pblock ranges contradict LOC constraints
WARNING: [DRC CHECK-3] Report rule limit reached

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