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Merge remote-tracking branch 'stable/linux-6.8.y' into v6.8+
2 parents 93f7d10 + ecd507c commit c295de1

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Lines changed: 4772 additions & 2551 deletions

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Documentation/Makefile

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@@ -111,7 +111,9 @@ $(YNL_INDEX): $(YNL_RST_FILES)
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$(YNL_RST_DIR)/%.rst: $(YNL_YAML_DIR)/%.yaml $(YNL_TOOL)
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$(Q)$(YNL_TOOL) -i $< -o $@
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htmldocs: $(YNL_INDEX)
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htmldocs texinfodocs latexdocs epubdocs xmldocs: $(YNL_INDEX)
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htmldocs:
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@$(srctree)/scripts/sphinx-pre-install --version-check
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@+$(foreach var,$(SPHINXDIRS),$(call loop_cmd,sphinx,html,$(var),,$(var)))
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Documentation/admin-guide/kernel-parameters.txt

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mem_encrypt= [X86-64] AMD Secure Memory Encryption (SME) control
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Valid arguments: on, off
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Default (depends on kernel configuration option):
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on (CONFIG_AMD_MEM_ENCRYPT_ACTIVE_BY_DEFAULT=y)
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off (CONFIG_AMD_MEM_ENCRYPT_ACTIVE_BY_DEFAULT=n)
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Default: off
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mem_encrypt=on: Activate SME
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mem_encrypt=off: Do not activate SME
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Documentation/arch/x86/amd-memory-encryption.rst

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@@ -87,14 +87,14 @@ The state of SME in the Linux kernel can be documented as follows:
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kernel is non-zero).
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SME can also be enabled and activated in the BIOS. If SME is enabled and
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activated in the BIOS, then all memory accesses will be encrypted and it will
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not be necessary to activate the Linux memory encryption support. If the BIOS
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merely enables SME (sets bit 23 of the MSR_AMD64_SYSCFG), then Linux can activate
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memory encryption by default (CONFIG_AMD_MEM_ENCRYPT_ACTIVE_BY_DEFAULT=y) or
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by supplying mem_encrypt=on on the kernel command line. However, if BIOS does
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not enable SME, then Linux will not be able to activate memory encryption, even
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if configured to do so by default or the mem_encrypt=on command line parameter
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is specified.
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activated in the BIOS, then all memory accesses will be encrypted and it
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will not be necessary to activate the Linux memory encryption support.
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If the BIOS merely enables SME (sets bit 23 of the MSR_AMD64_SYSCFG),
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then memory encryption can be enabled by supplying mem_encrypt=on on the
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kernel command line. However, if BIOS does not enable SME, then Linux
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will not be able to activate memory encryption, even if configured to do
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so by default or the mem_encrypt=on command line parameter is specified.
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Secure Nested Paging (SNP)
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==========================

Documentation/conf.py

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@@ -346,9 +346,9 @@ def get_cline_version():
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html_static_path = ['sphinx-static']
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# If true, Docutils "smart quotes" will be used to convert quotes and dashes
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# to typographically correct entities. This will convert "--" to "—",
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# which is not always what we want, so disable it.
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smartquotes = False
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# to typographically correct entities. However, conversion of "--" to "—"
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# is not always what we want, so enable only quotes.
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smartquotes_action = 'q'
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# Custom sidebar templates, maps document names to template names.
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# Note that the RTD theme ignores this

Documentation/userspace-api/media/mediactl/media-types.rst

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@@ -375,12 +375,11 @@ Types and flags used to represent the media graph elements
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are origins of links.
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* - ``MEDIA_PAD_FL_MUST_CONNECT``
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- If this flag is set and the pad is linked to any other pad, then
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at least one of those links must be enabled for the entity to be
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able to stream. There could be temporary reasons (e.g. device
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configuration dependent) for the pad to need enabled links even
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when this flag isn't set; the absence of the flag doesn't imply
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there is none.
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- If this flag is set, then for this pad to be able to stream, it must
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be connected by at least one enabled link. There could be temporary
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reasons (e.g. device configuration dependent) for the pad to need
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enabled links even when this flag isn't set; the absence of the flag
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doesn't imply there is none.
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One and only one of ``MEDIA_PAD_FL_SINK`` and ``MEDIA_PAD_FL_SOURCE``

Makefile

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# SPDX-License-Identifier: GPL-2.0
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VERSION = 6
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PATCHLEVEL = 8
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SUBLEVEL = 2
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SUBLEVEL = 3
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EXTRAVERSION =
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NAME = Hurr durr I'ma ninja sloth
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arch/arm/Kconfig

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@@ -503,8 +503,8 @@ source "arch/arm/mm/Kconfig"
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config IWMMXT
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bool "Enable iWMMXt support"
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depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4 || CPU_PJ4B
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default y if PXA27x || PXA3xx || ARCH_MMP || CPU_PJ4 || CPU_PJ4B
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depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK
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default y if PXA27x || PXA3xx || ARCH_MMP
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help
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Enable support for iWMMXt context switching at run time if
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running on a CPU that supports it.

arch/arm/boot/dts/marvell/mmp2-brownstone.dts

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&twsi1 {
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status = "okay";
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pmic: max8925@3c {
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compatible = "maxium,max8925";
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compatible = "maxim,max8925";
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reg = <0x3c>;
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interrupts = <1>;
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interrupt-parent = <&intcmux4>;

arch/arm/include/asm/mman.h

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/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef __ASM_MMAN_H__
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#define __ASM_MMAN_H__
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#include <asm/system_info.h>
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#include <uapi/asm/mman.h>
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static inline bool arch_memory_deny_write_exec_supported(void)
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{
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return cpu_architecture() >= CPU_ARCH_ARMv6;
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}
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#define arch_memory_deny_write_exec_supported arch_memory_deny_write_exec_supported
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#endif /* __ASM_MMAN_H__ */

arch/arm/kernel/Makefile

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@@ -75,8 +75,6 @@ obj-$(CONFIG_HAVE_HW_BREAKPOINT) += hw_breakpoint.o
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obj-$(CONFIG_CPU_XSCALE) += xscale-cp0.o
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obj-$(CONFIG_CPU_XSC3) += xscale-cp0.o
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obj-$(CONFIG_CPU_MOHAWK) += xscale-cp0.o
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obj-$(CONFIG_CPU_PJ4) += pj4-cp0.o
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obj-$(CONFIG_CPU_PJ4B) += pj4-cp0.o
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obj-$(CONFIG_IWMMXT) += iwmmxt.o
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obj-$(CONFIG_PERF_EVENTS) += perf_regs.o perf_callchain.o
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obj-$(CONFIG_HW_PERF_EVENTS) += perf_event_xscale.o perf_event_v6.o \

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