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Greg Roth
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Add IR test for dxilgen pass
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// RUN: %dxc -T cs_6_9 -enable-16bit-types -DNUM=13 %s | FileCheck %s
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// Source for dxilgen test CodeGenDXIL/passes/longvec-intrinsics.ll.
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// Some targetted filecheck testing as an incidental.
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RWStructuredBuffer<vector<float16_t, NUM> > hBuf;
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RWStructuredBuffer<vector<float, NUM> > fBuf;
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RWStructuredBuffer<vector<double, NUM> > dBuf;
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RWStructuredBuffer<vector<bool, NUM> > bBuf;
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RWStructuredBuffer<vector<uint, NUM> > uBuf;
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RWStructuredBuffer<vector<int64_t, NUM> > lBuf;
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[numthreads(8,1,1)]
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void main() {
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// CHECK: [[ld:%.*]] = call %dx.types.ResRet.v13f32 @dx.op.rawBufferVectorLoad.v13f32(i32 303, %dx.types.Handle {{%.*}}, i32 11, i32 0, i32 4)
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// CHECK: [[fvec1:%.*]] = extractvalue %dx.types.ResRet.v13f32 [[ld]], 0
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// CHECK: [[ld:%.*]] = call %dx.types.ResRet.v13f32 @dx.op.rawBufferVectorLoad.v13f32(i32 303, %dx.types.Handle {{%.*}}, i32 12, i32 0, i32 4)
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// CHECK: [[fvec2:%.*]] = extractvalue %dx.types.ResRet.v13f32 [[ld]], 0
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// CHECK: [[ld:%.*]] = call %dx.types.ResRet.v13f32 @dx.op.rawBufferVectorLoad.v13f32(i32 303, %dx.types.Handle {{%.*}}, i32 13, i32 0, i32 4)
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// CHECK: [[fvec3:%.*]] = extractvalue %dx.types.ResRet.v13f32 [[ld]], 0
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vector<float, NUM> fVec1 = fBuf[11];
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vector<float, NUM> fVec2 = fBuf[12];
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vector<float, NUM> fVec3 = fBuf[13];
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// CHECK: [[tmp:%.*]] = call <13 x float> @dx.op.binary.v13f32(i32 35, <13 x float> [[fvec1]], <13 x float> [[fvec2]]) ; FMax(a,b)
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// CHECK: call <13 x float> @dx.op.binary.v13f32(i32 36, <13 x float> [[tmp]], <13 x float> [[fvec3]]) ; FMin(a,b)
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vector<float, NUM> fRes = clamp(fVec1, fVec2, fVec3);
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// CHECK: [[ld:%.*]] = call %dx.types.ResRet.v13f16 @dx.op.rawBufferVectorLoad.v13f16(i32 303, %dx.types.Handle {{%.*}}, i32 14, i32 0, i32 2)
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// CHECK: [[hvec1:%.*]] = extractvalue %dx.types.ResRet.v13f16 [[ld]], 0
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// CHECK: [[ld:%.*]] = call %dx.types.ResRet.v13f16 @dx.op.rawBufferVectorLoad.v13f16(i32 303, %dx.types.Handle {{%.*}}, i32 15, i32 0, i32 2)
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// CHECK: [[hvec2:%.*]] = extractvalue %dx.types.ResRet.v13f16 [[ld]], 0
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// CHECK: [[ld:%.*]] = call %dx.types.ResRet.v13f16 @dx.op.rawBufferVectorLoad.v13f16(i32 303, %dx.types.Handle {{%.*}}, i32 16, i32 0, i32 2)
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// CHECK: [[hvec3:%.*]] = extractvalue %dx.types.ResRet.v13f16 [[ld]], 0
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vector<float16_t, NUM> hVec1 = hBuf[14];
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vector<float16_t, NUM> hVec2 = hBuf[15];
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vector<float16_t, NUM> hVec3 = hBuf[16];
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// CHECK: [[tmp:%.*]] = fcmp fast olt <13 x half> [[hvec2]], [[hvec1]]
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// CHECK: select <13 x i1> [[tmp]], <13 x half> zeroinitializer, <13 x half> <half 0xH3C00
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vector<float16_t, NUM> hRes = step(hVec1, hVec2);
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// CHECK: [[tmp:%.*]] = fmul fast <13 x float> [[fvec1]], <float 0x
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// CHECK: call <13 x float> @dx.op.unary.v13f32(i32 21, <13 x float> [[tmp]]) ; Exp(value)
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fRes += exp(fVec1);
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// CHECK: [[tmp:%.*]] = call <13 x half> @dx.op.unary.v13f16(i32 23, <13 x half> [[hvec1]]) ; Log(value)
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// CHECK: fmul fast <13 x half> [[tmp]], <half 0xH398C
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hRes += log(hVec1);
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// CHECK: [[sub:%.*]] = fsub fast <13 x float> [[fvec2]], [[fvec1]]
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// CHECK: [[xsub:%.*]] = fsub fast <13 x float> [[fvec3]], [[fvec1]]
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// CHECK: [[div:%.*]] = fdiv fast <13 x float> [[xsub]], [[sub]]
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// CHECK: [[sat:%.*]] = call <13 x float> @dx.op.unary.v13f32(i32 7, <13 x float> [[div]]) ; Saturate(value)
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// CHECK: [[mul:%.*]] = fmul fast <13 x float> [[sat]], <float 2.000000e+00,
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// CHECK: [[sub:%.*]] = fsub fast <13 x float> <float 3.000000e+00, {{.*}}>, [[mul]]
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// CHECK: [[mul:%.*]] = fmul fast <13 x float> [[sat]], [[sat]]
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// CHECK: fmul fast <13 x float> [[mul]], [[sub]]
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fRes += smoothstep(fVec1, fVec2, fVec3);
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// Intrinsics that expand into llvm ops.
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// CHECK: fmul fast <13 x float> [[fvec3]], <float 0x3F91DF46A0000000
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fRes += radians(fVec3);
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// CHECK: [[cmp:%.*]] = fcmp fast une <13 x float> [[fvec1]], zeroinitializer
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// CHECK: [[f2i:%.*]] = bitcast <13 x float> [[fvec1]] to <13 x i32>
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// CHECK: [[and:%.*]] = and <13 x i32> [[f2i]], <i32 2139095040
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// CHECK: [[add:%.*]] = add nsw <13 x i32> [[and]], <i32 -1056964608
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// CHECK: [[shr:%.*]] = ashr <13 x i32> [[add]], <i32 23
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// CHECK: [[i2f:%.*]] = sitofp <13 x i32> [[shr]] to <13 x float>
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// CHECK: [[sel:%.*]] = select <13 x i1> [[cmp]], <13 x float> [[i2f]], <13 x float> zeroinitializer
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// CHECK: [[and:%.*]] = and <13 x i32> [[f2i]], <i32 8388607
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// CHECK: or <13 x i32> [[and]], <i32 1056964608
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vector<float, NUM> exp = fVec3;
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fRes += frexp(fVec1, exp);
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fRes += exp;
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// CHECK: [[tmp:%.*]] = fsub fast <13 x half> [[hvec3]], [[hvec2]]
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// CHECK: fmul fast <13 x half> [[tmp]], [[hvec1]]
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hRes += lerp(hVec2, hVec3, hVec1);
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// CHECK: [[ld:%.*]] = call %dx.types.ResRet.v13i32 @dx.op.rawBufferVectorLoad.v13i32(i32 303, %dx.types.Handle {{%.*}}, i32 17, i32 0, i32 4)
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// CHECK: [[uvec1:%.*]] = extractvalue %dx.types.ResRet.v13i32 [[ld]], 0
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// CHECK: [[ld:%.*]] = call %dx.types.ResRet.v13i32 @dx.op.rawBufferVectorLoad.v13i32(i32 303, %dx.types.Handle {{%.*}}, i32 18, i32 0, i32 4)
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// CHECK: [[uvec2:%.*]] = extractvalue %dx.types.ResRet.v13i32 [[ld]], 0
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vector<uint, NUM> uVec1 = uBuf[17];
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vector<uint, NUM> uVec2 = uBuf[18];
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vector<uint, NUM> signs = 1;
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// CHECK: [[cmp:%.*]] = icmp ne <13 x i32> [[uvec2]], zeroinitializer
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// CHECK: zext <13 x i1> [[cmp]] to <13 x i32>
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signs *= sign(uVec2);
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// CHECK: [[ld:%.*]] = call %dx.types.ResRet.v13i64 @dx.op.rawBufferVectorLoad.v13i64(i32 303, %dx.types.Handle {{%.*}}, i32 19, i32 0, i32 8)
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// CHECK: [[lvec1:%.*]] = extractvalue %dx.types.ResRet.v13i64 [[ld]], 0
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// CHECK: [[ld:%.*]] = call %dx.types.ResRet.v13i64 @dx.op.rawBufferVectorLoad.v13i64(i32 303, %dx.types.Handle {{%.*}}, i32 20, i32 0, i32 8)
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// CHECK: [[lvec2:%.*]] = extractvalue %dx.types.ResRet.v13i64 [[ld]], 0
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vector<int64_t, NUM> lVec1 = lBuf[19];
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vector<int64_t, NUM> lVec2 = lBuf[20];
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// CHECK: [[gt:%.*]] = icmp sgt <13 x i64> [[lvec2]], zeroinitializer
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// CHECK: [[lt:%.*]] = icmp slt <13 x i64> [[lvec2]], zeroinitializer
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// CHECK: [[igt:%.*]] = zext <13 x i1> [[gt]] to <13 x i32>
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// CHECK: [[ilt:%.*]] = zext <13 x i1> [[lt]] to <13 x i32>
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// CHECK: sub nsw <13 x i32> [[igt]], [[ilt]]
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signs *= sign(lVec2);
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vector<uint, NUM> uRes = signs;
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// CHECK: [[ld:%.*]] = call %dx.types.ResRet.v13i32 @dx.op.rawBufferVectorLoad.v13i32(i32 303, %dx.types.Handle {{%.*}}, i32 21, i32 0, i32 4)
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// CHECK: [[vec:%.*]] = extractvalue %dx.types.ResRet.v13i32 [[ld]], 0
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// CHECK: [[bvec:%.*]] = icmp ne <13 x i32> [[vec]], zeroinitializer
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// CHECK: [[vec1:%.*]] = zext <13 x i1> [[bvec]] to <13 x i32>
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// CHECK: [[ld:%.*]] = call %dx.types.ResRet.v13i32 @dx.op.rawBufferVectorLoad.v13i32(i32 303, %dx.types.Handle {{%.*}}, i32 22, i32 0, i32 4)
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// CHECK: [[vec:%.*]] = extractvalue %dx.types.ResRet.v13i32 [[ld]], 0
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// CHECK: [[bvec:%.*]] = icmp ne <13 x i32> [[vec]], zeroinitializer
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// CHECK: [[vec2:%.*]] = zext <13 x i1> [[bvec]] to <13 x i32>
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// CHECK: [[ld:%.*]] = call %dx.types.ResRet.v13i32 @dx.op.rawBufferVectorLoad.v13i32(i32 303, %dx.types.Handle {{%.*}}, i32 23, i32 0, i32 4)
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// CHECK: [[vec:%.*]] = extractvalue %dx.types.ResRet.v13i32 [[ld]], 0
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// CHECK: [[bvec:%.*]] = icmp ne <13 x i32> [[vec]], zeroinitializer
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// CHECK: [[vec3:%.*]] = zext <13 x i1> [[bvec]] to <13 x i32>
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vector<bool, NUM> bVec1 = bBuf[21];
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vector<bool, NUM> bVec2 = bBuf[22];
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vector<bool, NUM> bVec3 = bBuf[23];
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// CHECK: [[bvec2:%.*]] = icmp ne <13 x i32> [[vec2]], zeroinitializer
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// CHECK: [[bvec1:%.*]] = icmp ne <13 x i32> [[vec1]], zeroinitializer
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// CHECK: or <13 x i1> [[bvec2]], [[bvec1]]
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uRes += or(bVec1, bVec2);
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// CHECK: [[bvec3:%.*]] = icmp ne <13 x i32> [[vec3]], zeroinitializer
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// CHECK: and <13 x i1> [[bvec3]], [[bvec2]]
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uRes += and(bVec2, bVec3);
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// CHECK: select <13 x i1> [[bvec3]], <13 x i64> [[lvec1]], <13 x i64> [[lvec2]]
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vector<int64_t, NUM> lRes = select(bVec3, lVec1, lVec2);
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// CHECK: [[el1:%.*]] = extractelement <13 x float> [[fvec1]]
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// CHECK: [[el2:%.*]] = extractelement <13 x float> [[fvec2]]
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// CHECK: [[mul:%.*]] = fmul fast float [[el2]], [[el1]]
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// CHECK: [[mad1:%.*]] = call float @dx.op.tertiary.f32(i32 46, float %{{.*}}, float %{{.*}}, float [[mul]]) ; FMad(a,b,c)
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// CHECK: [[mad2:%.*]] = call float @dx.op.tertiary.f32(i32 46, float %{{.*}}, float %{{.*}}, float [[mad1]]) ; FMad(a,b,c)
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// CHECK: [[mad3:%.*]] = call float @dx.op.tertiary.f32(i32 46, float %{{.*}}, float %{{.*}}, float [[mad2]]) ; FMad(a,b,c)
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// CHECK: [[mad4:%.*]] = call float @dx.op.tertiary.f32(i32 46, float %{{.*}}, float %{{.*}}, float [[mad3]]) ; FMad(a,b,c)
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// CHECK: [[mad5:%.*]] = call float @dx.op.tertiary.f32(i32 46, float %{{.*}}, float %{{.*}}, float [[mad4]]) ; FMad(a,b,c)
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// CHECK: [[mad6:%.*]] = call float @dx.op.tertiary.f32(i32 46, float %{{.*}}, float %{{.*}}, float [[mad5]]) ; FMad(a,b,c)
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// CHECK: [[mad7:%.*]] = call float @dx.op.tertiary.f32(i32 46, float %{{.*}}, float %{{.*}}, float [[mad6]]) ; FMad(a,b,c)
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// CHECK: [[mad8:%.*]] = call float @dx.op.tertiary.f32(i32 46, float %{{.*}}, float %{{.*}}, float [[mad7]]) ; FMad(a,b,c)
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// CHECK: [[mad9:%.*]] = call float @dx.op.tertiary.f32(i32 46, float %{{.*}}, float %{{.*}}, float [[mad8]]) ; FMad(a,b,c)
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// CHECK: [[mad10:%.*]] = call float @dx.op.tertiary.f32(i32 46, float %{{.*}}, float %{{.*}}, float [[mad9]]) ; FMad(a,b,c)
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// CHECK: [[mad11:%.*]] = call float @dx.op.tertiary.f32(i32 46, float %{{.*}}, float %{{.*}}, float [[mad10]]) ; FMad(a,b,c)
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// CHECK: [[mad12:%.*]] = call float @dx.op.tertiary.f32(i32 46, float %{{.*}}, float %{{.*}}, float [[mad11]]) ; FMad(a,b,c)
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fRes += dot(fVec1, fVec2);
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// CHECK: call <13 x float> @dx.op.unary.v13f32(i32 17, <13 x float> [[fvec1]]) ; Atan(value)
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fRes += atan(fVec1);
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// CHECK: call <13 x i32> @dx.op.binary.v13i32(i32 40, <13 x i32> [[uvec1]], <13 x i32> [[uvec2]]) ; UMin(a,b)
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uRes += min(uVec1, uVec2);
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// CHECK: call <13 x float> @dx.op.tertiary.v13f32(i32 46, <13 x float> [[fvec1]], <13 x float> [[fvec2]], <13 x float> [[fvec3]]) ; FMad(a,b,c)
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fRes += mad(fVec1, fVec2, fVec3);
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// CHECK: [[ld:%.*]] = call %dx.types.ResRet.v13f64 @dx.op.rawBufferVectorLoad.v13f64(i32 303, %dx.types.Handle {{%.*}}, i32 24, i32 0, i32 8)
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// CHECK: [[dvec1:%.*]] = extractvalue %dx.types.ResRet.v13f64 [[ld]], 0
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// CHECK: [[ld:%.*]] = call %dx.types.ResRet.v13f64 @dx.op.rawBufferVectorLoad.v13f64(i32 303, %dx.types.Handle {{%.*}}, i32 25, i32 0, i32 8)
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// CHECK: [[dvec2:%.*]] = extractvalue %dx.types.ResRet.v13f64 [[ld]], 0
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// CHECK: [[ld:%.*]] = call %dx.types.ResRet.v13f64 @dx.op.rawBufferVectorLoad.v13f64(i32 303, %dx.types.Handle {{%.*}}, i32 26, i32 0, i32 8)
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// CHECK: [[dvec3:%.*]] = extractvalue %dx.types.ResRet.v13f64 [[ld]], 0
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vector<double, NUM> dVec1 = dBuf[24];
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vector<double, NUM> dVec2 = dBuf[25];
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vector<double, NUM> dVec3 = dBuf[26];
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// CHECK: call <13 x double> @dx.op.tertiary.v13f64(i32 47, <13 x double> [[dvec1]], <13 x double> [[dvec2]], <13 x double> [[dvec3]])
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vector<double, NUM> dRes = fma(dVec1, dVec2, dVec3);
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hBuf[0] = hRes;
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fBuf[0] = fRes;
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dBuf[0] = dRes;
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uBuf[0] = uRes;
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lBuf[0] = lRes;
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}

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