33
44// CHECK-ERROR: error: Vulkan 1.1 is required for Wave Operation but not permitted to use
55
6- // CHECK: OpCapability GroupNonUniformPartitionedNV
6+ // CHECK: OpCapability GroupNonUniformPartitionedEXT
77// CHECK: OpExtension "SPV_NV_shader_subgroup_partitioned"
88
99StructuredBuffer<uint4 > g_mask;
@@ -13,37 +13,37 @@ uint4 main(int4 input0 : ATTR0, uint4 input1 : ATTR1) : SV_Target {
1313
1414// CHECK: [[input0:%[0-9]+]] = OpLoad %v4int %input0
1515// CHECK: [[mask:%[0-9]+]] = OpLoad %v4uint %mask
16- // CHECK: {{%[0-9]+}} = OpGroupNonUniformIMul %v4int %uint_3 PartitionedExclusiveScanNV [[input0]] [[mask]]
16+ // CHECK: {{%[0-9]+}} = OpGroupNonUniformIMul %v4int %uint_3 PartitionedExclusiveScanEXT [[input0]] [[mask]]
1717 int4 res = WaveMultiPrefixProduct (input0, mask);
1818
1919// CHECK: [[input1:%[0-9]+]] = OpLoad %v4uint %input1
2020// CHECK: [[mask:%[0-9]+]] = OpLoad %v4uint %mask
21- // CHECK: {{%[0-9]+}} = OpGroupNonUniformIMul %v4uint %uint_3 PartitionedExclusiveScanNV [[input1]] [[mask]]
21+ // CHECK: {{%[0-9]+}} = OpGroupNonUniformIMul %v4uint %uint_3 PartitionedExclusiveScanEXT [[input1]] [[mask]]
2222 res += WaveMultiPrefixProduct (input1, mask);
2323
2424// CHECK: [[input0:%[0-9]+]] = OpLoad %v4int %input0
2525// CHECK: [[mask:%[0-9]+]] = OpLoad %v4uint %mask
26- // CHECK: {{%[0-9]+}} = OpGroupNonUniformIAdd %v4int %uint_3 PartitionedExclusiveScanNV [[input0]] [[mask]]
26+ // CHECK: {{%[0-9]+}} = OpGroupNonUniformIAdd %v4int %uint_3 PartitionedExclusiveScanEXT [[input0]] [[mask]]
2727 res += WaveMultiPrefixSum (input0, mask);
2828
2929// CHECK: [[input1:%[0-9]+]] = OpLoad %v4uint %input1
3030// CHECK: [[mask:%[0-9]+]] = OpLoad %v4uint %mask
31- // CHECK: {{%[0-9]+}} = OpGroupNonUniformIAdd %v4uint %uint_3 PartitionedExclusiveScanNV [[input1]] [[mask]]
31+ // CHECK: {{%[0-9]+}} = OpGroupNonUniformIAdd %v4uint %uint_3 PartitionedExclusiveScanEXT [[input1]] [[mask]]
3232 res += WaveMultiPrefixSum (input1, mask);
3333
3434// CHECK: [[input1:%[0-9]+]] = OpLoad %v4uint %input1
3535// CHECK: [[mask:%[0-9]+]] = OpLoad %v4uint %mask
36- // CHECK: {{%[0-9]+}} = OpGroupNonUniformBitwiseAnd %v4uint %uint_3 PartitionedExclusiveScanNV [[input1]] [[mask]]
36+ // CHECK: {{%[0-9]+}} = OpGroupNonUniformBitwiseAnd %v4uint %uint_3 PartitionedExclusiveScanEXT [[input1]] [[mask]]
3737 res += WaveMultiPrefixBitAnd (input1, mask);
3838
3939// CHECK: [[input1:%[0-9]+]] = OpLoad %v4uint %input1
4040// CHECK: [[mask:%[0-9]+]] = OpLoad %v4uint %mask
41- // CHECK: {{%[0-9]+}} = OpGroupNonUniformBitwiseOr %v4uint %uint_3 PartitionedExclusiveScanNV [[input1]] [[mask]]
41+ // CHECK: {{%[0-9]+}} = OpGroupNonUniformBitwiseOr %v4uint %uint_3 PartitionedExclusiveScanEXT [[input1]] [[mask]]
4242 res += WaveMultiPrefixBitOr (input1, mask);
4343
4444// CHECK: [[input1:%[0-9]+]] = OpLoad %v4uint %input1
4545// CHECK: [[mask:%[0-9]+]] = OpLoad %v4uint %mask
46- // CHECK: {{%[0-9]+}} = OpGroupNonUniformBitwiseXor %v4uint %uint_3 PartitionedExclusiveScanNV [[input1]] [[mask]]
46+ // CHECK: {{%[0-9]+}} = OpGroupNonUniformBitwiseXor %v4uint %uint_3 PartitionedExclusiveScanEXT [[input1]] [[mask]]
4747 res += WaveMultiPrefixBitXor (input1, mask);
4848 return res;
4949}
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