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@@ -515,33 +515,52 @@ Additional shader properties are specified via tag-value pair list, which is the
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Shader Flags
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Shaders have additional flags that covey their capabilities via tag-value pair with tag kDxilShaderFlagsTag (0), followed by an i64 bitmask integer. The bits have the following meaning:
Shaders have additional flags that convey their capabilities via a tag-value pair with tag kDxilShaderFlagsTag (0), followed by an i64 bitmask integer. The bits have the following meaning, Shader Model requirements, and criteria for being set:
0 Disable shader optimizations Command-line flag ``-disable-llvm-optzns`` provided to DXC's internal frontend
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1 Disable math refactoring Not set
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2 Double-precision floating point Use of the double data type
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3 Force early depth-stencil test Shader is a pixel shader, and the ``[earlydepthstencil]`` attribute is present in the HLSL source
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4 Raw and structured buffers Use of RawBuffer or StructuredBuffer resource types
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5 Low-precision data types Use of half or i16 data types
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6 Double-precision extensions Use of FDiv, UIToFP, SIToFP, FPToUI, FPToSI, or Fma instructions with a double type
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7 Masked sum of absolute differences Use of the Msad instruction
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8 All resources bound for the duration of shader execution Command-line flag ``/all_resources_bound`` provided to DXC
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9 View port or render target array index from any shader feeding rasterizer ViewPortArrayIndex or RenderTargetArrayIndex semantics are present in the input signature of a geometry shader, or the output signature of a vertex, domain, or hull shader. If DXIL validator version < 1.4, this flag is also required if the ViewPortArrayIndex or RenderTargetArrayIndex semantics are present in the input signature of domain and hull shaders
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10 Inner coverage Use of the InnerCoverage instruction, or the InnerCoverage semantic is present in the output signature of a pixel shader
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11 Stencil reference value The StencilRef semantic is present in the output signature of a pixel shader
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12 Tiled resources Use of the CheckAccessFullyMapped instruction or, if DXIL validator version >= 1.8, the use of LodClamp in intrinsics SampleGrad, SampleCmpGrad, Sample, SampleBias, SampleCmp, or SampleCmpBias
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13 Typed UAV load additional formats Use of TextureLoad or BufferLoad on a UAV with a multi-component data type. If DXIL validator version == 1.0 then this flag is set when a TextureLoad or BufferLoad is used on any UAV, regardless of its data type
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14 Comparison filtering for feature level 9 Not set
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15 64 UAV slots The presence of more than 8 UAVs. If Shader Model >= 6.6, then UAV ranges count as multiple UAVs
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16 UAVs at every shader stage The shader has UAVs and: if Shader Model >= 6.8, the shader is a vertex, hull, domain, or geometry shader; else (Shader Model < 6.8) the shader is not a compute or pixel shader
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17 CS4 raw and structured buffers Use of RawBuffer or StructuedBuffer in a Shader Model 4.x compute shader
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18 Rasterizer order views Not set
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19 Wave-level operations Use of any wave or quad intrinsic: WaveIsFirstLane, WaveGetLaneIndex, WaveGetLaneCount, WaveAnyTrue, WaveAllTrue, WaveActiveAllEqual, WaveActiveBallot, WaveReadLaneAt, WaveReadLaneFirst, WaveActiveOp, WaveActiveBit, WavePrefixOp, QuadReadLaneAt, QuadOp, WaveAllBitCount, WavePrefixBitCount, WaveMatch, WaveMultiPrefixOp, WaveMultiPrefixBitCount, QuadVote
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20 64-bit integers Use of i64 data types
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21 6.1+ View instancing Use of the ViewID instruction
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22 6.1+ Barycentrics Use of the AttributeAtVertex instruction, or the Barcentrics semantic is present in the shader input signature. If DXIL validator version < 1.6 then this flag must not be set at all
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23 6.2+ Use native low-precision data types Command-line flag ``-enable-16bit-types`` is provided to DXC
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24 6.4+ Variable-rate shading The ShadingRate semantic is present in the shader input or output signature
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25 6.5+ Raytracing tier 1.1 features Use of the AllocateRayQuery, AllocateRayQuery2, or GeometryIndex instruction
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26 6.5+ Sampler feedback Not set
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27 6.6+ 64-bit integer atomics on typed resources Use of i64 AtomicBinOp or AtomicCompareExchange instructions on a typed resource
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28 6.6+ 64-bit integer atomics on group shared Use of i64 AtomicBinOp or AtomicCompareExchange instructions on group shared memory
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29 6.6+ Derivatives in mesh and amp shaders Use of instructions DerivFineX, DerivFineY, DerivCoarseX, DerivCoarseY, CalculateLOD, Sample, SampleBias, SampleCmp, or SampleCmpBias in a mesh or amplification shader
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30 6.6+ Resource descriptor heap indexing Use of the CreateHandleFromHeap instruction on a resource descriptor heap
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31 6.6+ Sampler descriptor heap indexing Use of the CreateHandleFromHeap instruction on a sampler descriptor heap
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32 6.6+ 64-bit integer atomics on descriptor heap resources Use of i64 AtomicBinOp or AtomicCompareExchange instructions on a descriptor heap resource
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33 6.7+ Any UAV may not alias any other UAV If DXIL validator version >= 1.8: use of a UAV in any function. If DXIL validator version < 1.8: global presence of a UAV. This flag is not set if the ``-res-may-alias`` command-line flag is provided to DXC
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34 6.7+ Advanced texture operations Use of SampleCmpLevel or TextureGatherRaw instructions, or the use of TextureLoad, SampleLevel, SampleCmpLevelZero, Sample Grad, SampleCmpGrad, Sample, SampleBias, SampleCamp, or SampleCmpBias with non-constant offsets
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35 6.7+ Writeable MSAA textures Use of the TextureStoreSample instruction. Or if DXIL validator version < 1.8: the presence of Texture2DMS or Texture2DMSArray resources. Or if DXIL validator version >= 1.8: use of Texture2DMS or Texture2DMSArray resources in CreateHandle, CreateHandleForLib, or AnnotateHandle instructions
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36 6.9+ Reserved Unused
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37 6.8+ Expanded comparison sampling Use of the instructions SampleCmpGrad or SampleCmpBias
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38 6.8+ Extended command information Use of the instructions StartVertexLocation or StartInstanceLocation
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