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Fix vk::BufferPointer for non-SPIR-V builds PR description checker #2019: Pull request #7305 opened by dneto0
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Fix vk::BufferPointer for non-SPIR-V builds Check code formatting #3213: Pull request #7305 opened by dneto0
53s
53s
Implementation of the CoopVec Inference and Training builtin intrinisics Check code formatting #3212: Pull request #7290 synchronize by anupamachandra
54s
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Update SPIRV-Tools (#7303) Generate a coverage report and publish it to GitHub pages #1041: Commit c9170e5 pushed by s-perron
37m 55s main
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37m 55s
[SM6.9] Native vector load/store lowering Check code formatting #3211: Pull request #7292 synchronize by pow2clk
1m 7s
1m 7s
Update SPIRV-Tools Check code formatting #3210: Pull request #7303 opened by s-perron
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Update SPIRV-Tools PR description checker #2018: Pull request #7303 opened by s-perron
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[SER] REORDER_SCOPE Barrier semantic flag Check code formatting #3209: Pull request #7263 synchronize by simoll
1m 3s
1m 3s
Update DXC's CONTRIBUTING file (#7265) Generate a coverage report and publish it to GitHub pages #1040: Commit 6a73640 pushed by llvm-beanz
1h 16m 28s main
main
1h 16m 28s
Add UUID compiler extension check on Clang (#7286) Generate a coverage report and publish it to GitHub pages #1039: Commit 9010244 pushed by llvm-beanz
38m 29s main
main
38m 29s
[SER] REORDER_SCOPE Barrier semantic flag Check code formatting #3208: Pull request #7263 synchronize by simoll
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Clang::CodeGenSPIRV test for attribute.domain.isoline.hlsl is failing on ARM64 Release on Windows Check code formatting #3207: Issue comment #6184 (comment) edited by MarijnS95
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Clang::CodeGenSPIRV test for attribute.domain.isoline.hlsl is failing on ARM64 Release on Windows Check code formatting #3206: Issue comment #6184 (comment) edited by MarijnS95
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[SM6.9] Native vector load/store lowering Check code formatting #3205: Pull request #7292 synchronize by pow2clk
1m 25s
1m 25s
[SM6.9] Native vector load/store lowering Check code formatting #3204: Pull request #7292 synchronize by pow2clk
1m 11s
1m 11s
[SER] REORDER_SCOPE Barrier semantic flag Check code formatting #3203: Pull request #7263 synchronize by simoll
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1m 19s
[SER] 'reordercoherent' HLSL attribute and DXIL encoding Check code formatting #3202: Pull request #7250 synchronize by simoll
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[SER] 'reordercoherent' HLSL attribute and DXIL encoding Check code formatting #3201: Pull request #7250 synchronize by simoll
1m 3s
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[SM6.9] Native vector load/store lowering Check code formatting #3200: Pull request #7292 synchronize by pow2clk
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[SPIR-V] Implement QuadAny and QuadAll (#7266) Generate a coverage report and publish it to GitHub pages #1038: Commit 6556410 pushed by cassiebeckley
37m 41s main
main
37m 41s
Implementation of the CoopVec Inference and Training builtin intrinisics Check code formatting #3199: Pull request #7290 synchronize by anupamachandra
1m 7s
1m 7s
[OMM] Add DXR Entry point test, non-library target test, conforming t… Generate a coverage report and publish it to GitHub pages #1037: Commit 3b1a29b pushed by bob80905
37m 14s main
main
37m 14s
[SPIR-V] Implement QuadAny and QuadAll Check code formatting #3198: Pull request #7266 synchronize by cassiebeckley
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Implementation of the CoopVec Inference and Training builtin intrinisics Check code formatting #3197: Pull request #7290 synchronize by anupamachandra
58s
58s
[SM6.9] Native vector load/store lowering Check code formatting #3196: Pull request #7292 synchronize by pow2clk
57s
57s