feat: add power-limit command

Add feat_get() uidx parameter also for the command.

Signed-off-by: Tokunori Ikegami <[email protected]>

Author: ikegami-t

libnvme/src/nvme/types.h

@@ -9059,6 +9059,10 @@ enum nvme_features_id {
  * @NVME_FEAT_RRL_NVMSETID_MASK:
  * @NVME_FEAT_PLM_NVMSETID_SHIFT:
  * @NVME_FEAT_PLM_NVMSETID_MASK:
+ * @NVME_FEAT_POWER_LIMIT_PLV_SHIFT:
+ * @NVME_FEAT_POWER_LIMIT_PLV_MASK:
+ * @NVME_FEAT_POWER_LIMIT_PLS_SHIFT:
+ * @NVME_FEAT_POWER_LIMIT_PLS_MASK:
  **/
 enum nvme_feat {
 	NVME_FEAT_ARBITRATION_BURST_SHIFT	= 0,
@@ -9213,6 +9217,10 @@ enum nvme_feat {
 	NVME_FEAT_SANITIZE_NODRM_MASK	= 0x1,
 	NVME_FEAT_RESP_PTPL_SHIFT	= 0,
 	NVME_FEAT_RESP_PTPL_MASK	= 0x1,
+	NVME_FEAT_POWER_LIMIT_PLV_SHIFT	= 0,
+	NVME_FEAT_POWER_LIMIT_PLV_MASK	= 0xffff,
+	NVME_FEAT_POWER_LIMIT_PLS_SHIFT	= 16,
+	NVME_FEAT_POWER_LIMIT_PLS_MASK	= 0x3,
 };
 
 /**

libnvme/src/nvme/util.c

@@ -560,6 +560,7 @@ int nvme_get_feature_length(int fid, __u32 cdw11, enum nvme_data_tfr dir,
 	case NVME_FEAT_FID_RESV_MASK:
 	case NVME_FEAT_FID_RESV_PERSIST:
 	case NVME_FEAT_FID_WRITE_PROTECT:
+	case NVME_FEAT_FID_POWER_LIMIT:
 		*len = 0;
 		break;
 	case NVME_FEAT_FID_ENH_CTRL_METADATA:

libnvme/src/nvme/util.h

@@ -288,6 +288,9 @@ static inline void nvme_feature_decode_arbitration(__u32 value, __u8 *ab,
 #define NVME_FEAT_PM_PS(v)		NVME_GET(v, FEAT_PWRMGMT_PS)
 #define NVME_FEAT_PM_WH(v)		NVME_GET(v, FEAT_PWRMGMT_WH)
 
+#define NVME_FEAT_POWER_LIMIT_PLV(v)	NVME_GET(v, FEAT_POWER_LIMIT_PLV)
+#define NVME_FEAT_POWER_LIMIT_PLS(v)	NVME_GET(v, FEAT_POWER_LIMIT_PLS)
+
 static inline void nvme_feature_decode_power_mgmt(__u32 value, __u8 *ps,
 						  __u8 *wh)
 {

nvme-print-json.c

@@ -4078,6 +4078,51 @@ static void json_feature_show_fields_bpwp(struct json_object *r, unsigned int re
 	obj_add_str(r, "Boot Partition 1 Write Protection State", nvme_bpwps_to_string(field));
 }
 
+static char *get_power_and_scale(__u16 power, __u8 scale)
+{
+	char *str;
+	int ret;
+
+	switch (scale) {
+	case NVME_PSD_PS_NOT_REPORTED:
+		/* Not reported for this power state */
+		ret = asprintf(&str, "-");
+		break;
+	case NVME_PSD_PS_100_MICRO_WATT:
+		/* Units of 0.0001W */
+		ret = asprintf(&str, "%01u.%04uW", power / 10000,
+			       power % 10000);
+		break;
+	case NVME_PSD_PS_10_MILLI_WATT:
+		/* Units of 0.01W */
+		ret = asprintf(&str, "%01u.%02uW", power / 100, power % 100);
+		break;
+	default:
+		ret = asprintf(&str, "reserved");
+		break;
+	}
+
+	if (ret > 0)
+		return str;
+
+	return NULL;
+}
+
+static void json_feature_show_fields_power_limit(struct json_object *r,
+						 unsigned int result)
+{
+	__u8 field = NVME_FEAT_POWER_LIMIT_PLS(result);
+
+	_cleanup_free_ char *k =
+	    get_power_and_scale(NVME_FEAT_POWER_LIMIT_PLV(result), field);
+
+	obj_add_str(r, "Power Limit Scale (PLS)",
+		    nvme_feature_power_limit_scale_to_string(field));
+	obj_add_uint(r, "Power Limit Value (PLV)",
+		     NVME_FEAT_POWER_LIMIT_PLV(result));
+	obj_add_str(r, "Power Limit", k);
+}
+
 static void json_feature_show(enum nvme_features_id fid, int sel, unsigned int result)
 {
 	struct json_object *r;
@@ -4217,6 +4262,9 @@ static void json_feature_show_fields(enum nvme_features_id fid, unsigned int res
 	case NVME_FEAT_FID_BP_WRITE_PROTECT:
 		json_feature_show_fields_bpwp(r, result);
 		break;
+	case NVME_FEAT_FID_POWER_LIMIT:
+		json_feature_show_fields_power_limit(r, result);
+		break;
 	default:
 		break;
 	}

nvme-print-stdout.c

@@ -3186,10 +3186,8 @@ static void print_psd_workload(__u8 apw)
 	}
 }
 
-static void print_ps_power_and_scale(__le16 ctr_power, __u8 scale)
+static void print_power_and_scale(__u16 power, __u8 scale)
 {
-	__u16 power = le16_to_cpu(ctr_power);
-
 	switch (scale & 0x3) {
 	case NVME_PSD_PS_NOT_REPORTED:
 		/* Not reported for this power state */
@@ -3209,6 +3207,11 @@ static void print_ps_power_and_scale(__le16 ctr_power, __u8 scale)
 	}
 }
 
+static void print_ps_power_and_scale(__le16 ctr_power, __u8 scale)
+{
+	print_power_and_scale(le16_to_cpu(ctr_power), scale);
+}
+
 static void print_psd_time(const char *desc, __u8 time, __u8 ts)
 {
 	int width = 12 + strlen(desc);
@@ -5384,6 +5387,16 @@ static void stdout_feature_show_fields(enum nvme_features_id fid,
 		printf("\tBoot Partition 0 Write Protection State (BP0WPS): %s\n",
 			nvme_bpwps_to_string(field));
 		break;
+	case NVME_FEAT_FID_POWER_LIMIT:
+		field = NVME_FEAT_POWER_LIMIT_PLS(result);
+		printf("\tPower Limit Scale (PLS): %u - %s\n", field,
+		       nvme_feature_power_limit_scale_to_string(field));
+		printf("\tPower Limit Value (PLV): %u\n",
+		       NVME_FEAT_POWER_LIMIT_PLV(result));
+		printf("\tPower Limit: ");
+		print_power_and_scale(NVME_FEAT_POWER_LIMIT_PLV(result), field);
+		printf("\n");
+		break;
 	default:
 		break;
 	}

nvme-print.c

@@ -1495,6 +1495,22 @@ const char *nvme_pls_mode_to_string(__u8 mode)
 	return "Reserved";
 }
 
+const char *nvme_feature_power_limit_scale_to_string(__u8 pls)
+{
+	switch (pls) {
+	case NVME_PSD_PS_NOT_REPORTED:
+		return "not reported";
+	case NVME_PSD_PS_100_MICRO_WATT:
+		return "0.0001 W";
+	case NVME_PSD_PS_10_MILLI_WATT:
+		return "0.01 W";
+	default:
+		break;
+	}
+
+	return "Reserved";
+}
+
 void nvme_feature_show(enum nvme_features_id fid, int sel, unsigned int result)
 {
 	nvme_print(show_feature, NORMAL, fid, sel, result);

nvme-print.h

@@ -341,6 +341,7 @@ const char *nvme_ssi_state_to_string(__u8 state);
 const char *nvme_time_scale_to_string(__u8 ts);
 const char *nvme_pls_mode_to_string(__u8 mode);
 const char *nvme_bpwps_to_string(__u8 bpwps);
+const char *nvme_feature_power_limit_scale_to_string(__u8 pls);
 
 void nvme_dev_full_path(nvme_ns_t n, char *path, size_t len);
 void nvme_generic_full_path(nvme_ns_t n, char *path, size_t len);

nvme.c

@@ -191,6 +191,7 @@ const char *output_format = "Output format: normal|binary";
 const char *timeout = "timeout value, in milliseconds";
 const char *verbose = "Increase output verbosity";
 const char *dry_run = "show command instead of sending";
+const char *uuid_index = "UUID index";
 
 static const char *app_tag = "app tag for end-to-end PI";
 static const char *app_tag_mask = "app tag mask for end-to-end PI";
@@ -238,7 +239,6 @@ static const char *start_block = "64-bit LBA of first block to access";
 static const char *storage_tag = "storage tag for end-to-end PI";
 static const char *storage_tag_check = "This bit specifies if the Storage Tag field shall be checked as\n"
 	"part of end-to-end data protection processing";
-static const char *uuid_index = "UUID index";
 static const char *uuid_index_specify = "specify uuid index";
 static const char dash[51] = {[0 ... 49] = '=', '\0'};
 static const char space[51] = {[0 ... 49] = ' ', '\0'};

nvme.h

@@ -109,6 +109,7 @@ extern const char *output_format;
 extern const char *timeout;
 extern const char *verbose;
 extern const char *dry_run;
+extern const char *uuid_index;
 extern struct nvme_config nvme_cfg;
 
 int validate_output_format(const char *format, nvme_print_flags_t *flags);

plugins/feat/feat-nvme.c

@@ -48,9 +48,10 @@ static const char *timestamp_feat = "timestamp feature";
 static const char *temp_thresh_feat = "temperature threshold feature";
 static const char *arbitration_feat = "arbitration feature";
 static const char *volatile_wc_feat = "volatile write cache feature";
+static const char *power_limit_feat = "power limit feature";
 
 static int feat_get(struct nvme_transport_handle *hdl, const __u8 fid,
-		    __u32 cdw11, __u8 sel, const char *feat)
+		    __u32 cdw11, __u8 sel, __u8 uidx, const char *feat)
 {
 	__u64 result;
 	int err;
@@ -142,9 +143,10 @@ static int feat_power_mgmt(int argc, char **argv, struct command *acmd, struct p
 		return err;
 
 	if (argconfig_parse_seen(opts, "ps"))
-		err = power_mgmt_set(hdl, fid, cfg.ps, cfg.wh, argconfig_parse_seen(opts, "save"));
+		err = power_mgmt_set(hdl, fid, cfg.ps, cfg.wh,
+				     argconfig_parse_seen(opts, "save"));
 	else
-		err = feat_get(hdl, fid, 0, cfg.sel, power_mgmt_feat);
+		err = feat_get(hdl, fid, 0, cfg.sel, 0, power_mgmt_feat);
 
 	return err;
 }
@@ -240,11 +242,13 @@ static int feat_perfc(int argc, char **argv, struct command *acmd, struct plugin
 
 	cdw11 = NVME_SET(cfg.attri, FEAT_PERFC_ATTRI) | NVME_SET(cfg.rvspa, FEAT_PERFC_RVSPA);
 
-	if (argconfig_parse_seen(opts, "rvspa") || argconfig_parse_seen(opts, "r4karl") ||
+	if (argconfig_parse_seen(opts, "rvspa") ||
+	    argconfig_parse_seen(opts, "r4karl") ||
 	    argconfig_parse_seen(opts, "paid"))
-		err = perfc_set(hdl, fid, cdw11, &cfg, argconfig_parse_seen(opts, "save"));
+		err = perfc_set(hdl, fid, cdw11, &cfg,
+				argconfig_parse_seen(opts, "save"));
 	else
-		err = feat_get(hdl, fid, cdw11, cfg.sel, perfc_feat);
+		err = feat_get(hdl, fid, cdw11, cfg.sel, 0, perfc_feat);
 
 	return err;
 }
@@ -301,10 +305,12 @@ static int feat_hctm(int argc, char **argv, struct command *acmd, struct plugin
 	if (err)
 		return err;
 
-	if (argconfig_parse_seen(opts, "tmt1") || argconfig_parse_seen(opts, "tmt2"))
-		err = hctm_set(hdl, fid, cfg.tmt1, cfg.tmt2, argconfig_parse_seen(opts, "save"));
+	if (argconfig_parse_seen(opts, "tmt1") ||
+	    argconfig_parse_seen(opts, "tmt2"))
+		err = hctm_set(hdl, fid, cfg.tmt1, cfg.tmt2,
+			       argconfig_parse_seen(opts, "save"));
 	else
-		err = feat_get(hdl, fid, 0, cfg.sel, hctm_feat);
+		err = feat_get(hdl, fid, 0, cfg.sel, 0, hctm_feat);
 
 	return err;
 }
@@ -361,9 +367,10 @@ static int feat_timestamp(int argc, char **argv, struct command *acmd, struct pl
 		return err;
 
 	if (argconfig_parse_seen(opts, "tstmp"))
-		err = timestamp_set(hdl, fid, cfg.tstmp, argconfig_parse_seen(opts, "save"));
+		err = timestamp_set(hdl, fid, cfg.tstmp,
+				    argconfig_parse_seen(opts, "save"));
 	else
-		err = feat_get(hdl, fid, 0, cfg.sel, timestamp_feat);
+		err = feat_get(hdl, fid, 0, cfg.sel, 0, timestamp_feat);
 
 	return err;
 }
@@ -443,11 +450,13 @@ static int feat_temp_thresh(int argc, char **argv, struct command *acmd, struct
 	if (err)
 		return err;
 
-	if (argconfig_parse_seen(opts, "tmpth") || argconfig_parse_seen(opts, "tmpthh"))
+	if (argconfig_parse_seen(opts, "tmpth") ||
+	    argconfig_parse_seen(opts, "tmpthh"))
 		err = temp_thresh_set(hdl, fid, opts, &cfg);
 	else
 		err = feat_get(hdl, fid, NVME_SET(cfg.tmpsel, FEAT_TT_TMPSEL) |
-			       NVME_SET(cfg.thsel, FEAT_TT_THSEL), cfg.sel, temp_thresh_feat);
+			       NVME_SET(cfg.thsel, FEAT_TT_THSEL), cfg.sel, 0,
+			       temp_thresh_feat);
 
 	return err;
 }
@@ -529,7 +538,7 @@ static int feat_arbitration(int argc, char **argv, struct command *acmd, struct
 		return err;
 
 	if (argc == 2 || argconfig_parse_seen(opts, "sel"))
-		return feat_get(hdl, fid, 0, cfg.sel, "arbitration feature");
+		return feat_get(hdl, fid, 0, cfg.sel, 0, "arbitration feature");
 
 	return arbitration_set(hdl, fid, opts, &cfg);
 }
@@ -584,9 +593,79 @@ static int feat_volatile_wc(int argc, char **argv, struct command *acmd, struct
 		return err;
 
 	if (argconfig_parse_seen(opts, "wce"))
-		err = volatile_wc_set(hdl, fid, cfg.wce, argconfig_parse_seen(opts, "save"));
+		err = volatile_wc_set(hdl, fid, cfg.wce,
+				      argconfig_parse_seen(opts, "save"));
 	else
-		err = feat_get(hdl, fid, 0, cfg.sel, volatile_wc_feat);
+		err = feat_get(hdl, fid, 0, cfg.sel, 0, volatile_wc_feat);
+
+	return err;
+}
+
+static int power_limit_set(struct nvme_transport_handle *hdl, const __u8 fid,
+			   __u8 plv, __u8 pls, __u8 uidx, bool sv)
+{
+	__u32 cdw13 = NVME_SET(plv, FEAT_POWER_LIMIT_PLV) |
+		      NVME_SET(pls, FEAT_POWER_LIMIT_PLS);
+	__u64 result;
+	int err;
+
+	err = nvme_set_features(hdl, 0, fid, sv, 0, 0, cdw13, uidx, 0, NULL, 0,
+				&result);
+
+	nvme_show_init();
+
+	if (err > 0) {
+		nvme_show_status(err);
+	} else if (err < 0) {
+		nvme_show_perror("Set %s", power_limit_feat);
+	} else {
+		nvme_show_result("Set %s: 0x%04x (%s)", power_limit_feat, cdw13,
+				 sv ? "Save" : "Not save");
+		nvme_feature_show_fields(fid, cdw13, NULL);
+	}
+
+	nvme_show_finish();
+
+	return err;
+}
+
+static int feat_power_limit(int argc, char **argv, struct command *acmd,
+			    struct plugin *plugin)
+{
+	const char *plv = "power limit value";
+	const char *pls = "power limit scale";
+	const __u8 fid = NVME_FEAT_FID_POWER_LIMIT;
+
+	_cleanup_nvme_global_ctx_ struct nvme_global_ctx *ctx = NULL;
+
+	_cleanup_nvme_transport_handle_ struct nvme_transport_handle *hdl =
+	    NULL;
+	int err;
+
+	struct config {
+		__u8 plv;
+		__u8 pls;
+		__u8 uidx;
+		__u8 sel;
+	};
+
+	struct config cfg = { 0 };
+
+	FEAT_ARGS(opts,
+		  OPT_BYTE("plv", 'p', &cfg.plv, plv),
+		  OPT_BYTE("pls", 'l', &cfg.pls, pls),
+		  OPT_BYTE("uuid-index", 'u', &cfg.uidx, uuid_index));
+
+	err = parse_and_open(&ctx, &hdl, argc, argv, POWER_LIMIT_DESC, opts);
+	if (err)
+		return err;
+
+	if (argconfig_parse_seen(opts, "plv"))
+		err = power_limit_set(hdl, fid, cfg.plv, cfg.pls, cfg.uidx,
+				      argconfig_parse_seen(opts, "save"));
+	else
+		err = feat_get(hdl, fid, 0, cfg.sel, cfg.uidx,
+			       power_limit_feat);
 
 	return err;
 }