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RevanthRajashekarkeithbusch
RevanthRajashekar
authored and
keithbusch
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nvme-cli: Update NVMe Registers
 1. Add Controller Memory Buffer Memory Space Control (CMBMSC) 2. Add Controller Memory Buffer Status (CMBSTS) 3. Add Persistent Memory Region Memory Space Control (PMRMSC) Update show registers Signed-off-by: Revanth Rajashekar <[email protected]>
1 parent eceed42 commit b6b6081

2 files changed

Lines changed: 54 additions & 4 deletions

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‎linux/nvme.h‎

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -132,11 +132,14 @@ enum {
132132
NVME_REG_BPINFO = 0x0040, /* Boot Partition Information */
133133
NVME_REG_BPRSEL = 0x0044, /* Boot Partition Read Select */
134134
NVME_REG_BPMBL = 0x0048, /* Boot Partition Memory Buffer Location */
135+
NVME_REG_CMBMSC = 0x0050, /* Controller Memory Buffer Memory Space Control */
136+
NVME_REG_CMBSTS = 0x0058, /* Controller Memory Buffer Status */
135137
NVME_REG_PMRCAP = 0x0e00, /* Persistent Memory Capabilities */
136138
NVME_REG_PMRCTL = 0x0e04, /* Persistent Memory Region Control */
137139
NVME_REG_PMRSTS = 0x0e08, /* Persistent Memory Region Status */
138140
NVME_REG_PMREBS = 0x0e0c, /* Persistent Memory Region Elasticity Buffer Size */
139141
NVME_REG_PMRSWTP= 0x0e10, /* Persistent Memory Region Sustained Write Throughput */
142+
NVME_REG_PMRMSC = 0x0e14, /* Persistent Memory Region Controller Memory Space Control */
140143
NVME_REG_DBS = 0x1000, /* SQ 0 Tail Doorbell */
141144
};
142145

‎nvme-print.c‎

Lines changed: 51 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -3757,6 +3757,21 @@ static void show_registers_bpmbl(uint64_t bpmbl)
37573757
printf("\tBoot Partition Memory Buffer Base Address (BMBBA): %"PRIx64"\n", bpmbl);
37583758
}
37593759

3760+
static void show_registers_cmbmsc(uint64_t cmbmsc)
3761+
{
3762+
printf("\tController Base Address (CBA) : %lx\n",
3763+
(cmbmsc & 0xfffffffffffff000) >> 12);
3764+
printf("\tController Memory Space Enable (CMSE): %lx\n",
3765+
(cmbmsc & 0x0000000000000002) >> 1);
3766+
printf("\tCapabilities Registers Enabled (CRE) : CMBLOC and "\
3767+
"CMBSZ registers are%senabled\n\n", (cmbmsc & 0x0000000000000001) ? " " : " NOT ");
3768+
}
3769+
3770+
static void show_registers_cmbsts(__u32 cmbsts)
3771+
{
3772+
printf("\tController Base Address Invalid (CBAI): %x\n\n", (cmbsts & 0x00000001));
3773+
}
3774+
37603775
static void show_registers_pmrcap(__u32 pmrcap)
37613776
{
37623777
printf("\tPersistent Memory Region Timeout (PMRTO): %x\n", (pmrcap & 0x00ff0000) >> 16);
@@ -3823,6 +3838,12 @@ static void show_registers_pmrswtp(__u32 pmrswtp)
38233838
nvme_register_pmr_pmrszu_to_string(pmrswtp & 0x0000000f));
38243839
}
38253840

3841+
static void show_registers_pmrmsc(uint64_t pmrmsc)
3842+
{
3843+
printf("\tController Base Address (CBA) : %lx\n", (pmrmsc & 0xfffffffffffff000) >> 12);
3844+
printf("\tController Memory Space Enable (CMSE : %lx\n\n", (pmrmsc & 0x0000000000000001) >> 1);
3845+
}
3846+
38263847
static inline uint32_t mmio_read32(void *addr)
38273848
{
38283849
__le32 *p = addr;
@@ -3840,9 +3861,9 @@ static inline __u64 mmio_read64(void *addr)
38403861

38413862
void json_ctrl_registers(void *bar)
38423863
{
3843-
uint64_t cap, asq, acq, bpmbl;
3864+
uint64_t cap, asq, acq, bpmbl, cmbmsc, pmrmsc;
38443865
uint32_t vs, intms, intmc, cc, csts, nssr, aqa, cmbsz, cmbloc,
3845-
bpinfo, bprsel, pmrcap, pmrctl, pmrsts, pmrebs, pmrswtp;
3866+
bpinfo, bprsel, cmbsts, pmrcap, pmrctl, pmrsts, pmrebs, pmrswtp;
38463867
struct json_object *root;
38473868

38483869
cap = mmio_read64(bar + NVME_REG_CAP);
@@ -3860,11 +3881,14 @@ void json_ctrl_registers(void *bar)
38603881
bpinfo = mmio_read32(bar + NVME_REG_BPINFO);
38613882
bprsel = mmio_read32(bar + NVME_REG_BPRSEL);
38623883
bpmbl = mmio_read64(bar + NVME_REG_BPMBL);
3884+
cmbmsc = mmio_read64(bar + NVME_REG_CMBMSC);
3885+
cmbsts = mmio_read32(bar + NVME_REG_CMBSTS);
38633886
pmrcap = mmio_read32(bar + NVME_REG_PMRCAP);
38643887
pmrctl = mmio_read32(bar + NVME_REG_PMRCTL);
38653888
pmrsts = mmio_read32(bar + NVME_REG_PMRSTS);
38663889
pmrebs = mmio_read32(bar + NVME_REG_PMREBS);
38673890
pmrswtp = mmio_read32(bar + NVME_REG_PMRSWTP);
3891+
pmrmsc = mmio_read64(bar + NVME_REG_PMRMSC);
38683892

38693893
root = json_create_object();
38703894
json_object_add_value_uint(root, "cap", cap);
@@ -3882,21 +3906,24 @@ void json_ctrl_registers(void *bar)
38823906
json_object_add_value_int(root, "bpinfo", bpinfo);
38833907
json_object_add_value_int(root, "bprsel", bprsel);
38843908
json_object_add_value_uint(root, "bpmbl", bpmbl);
3909+
json_object_add_value_uint(root, "cmbmsc", cmbmsc);
3910+
json_object_add_value_int(root, "cmbsts", cmbsts);
38853911
json_object_add_value_int(root, "pmrcap", pmrcap);
38863912
json_object_add_value_int(root, "pmrctl", pmrctl);
38873913
json_object_add_value_int(root, "pmrsts", pmrsts);
38883914
json_object_add_value_int(root, "pmrebs", pmrebs);
38893915
json_object_add_value_int(root, "pmrswtp", pmrswtp);
3916+
json_object_add_value_uint(root, "pmrmsc", pmrmsc);
38903917
json_print_object(root, NULL);
38913918
printf("\n");
38923919
json_free_object(root);
38933920
}
38943921

38953922
void show_ctrl_registers(void *bar, unsigned int mode, bool fabrics)
38963923
{
3897-
uint64_t cap, asq, acq, bpmbl;
3924+
uint64_t cap, asq, acq, bpmbl, cmbmsc, pmrmsc;
38983925
uint32_t vs, intms, intmc, cc, csts, nssr, aqa, cmbsz, cmbloc, bpinfo,
3899-
bprsel, pmrcap, pmrctl, pmrsts, pmrebs, pmrswtp;
3926+
bprsel, cmbsts, pmrcap, pmrctl, pmrsts, pmrebs, pmrswtp;
39003927

39013928
int human = mode & HUMAN;
39023929

@@ -3915,11 +3942,14 @@ void show_ctrl_registers(void *bar, unsigned int mode, bool fabrics)
39153942
bpinfo = mmio_read32(bar + NVME_REG_BPINFO);
39163943
bprsel = mmio_read32(bar + NVME_REG_BPRSEL);
39173944
bpmbl = mmio_read64(bar + NVME_REG_BPMBL);
3945+
cmbmsc = mmio_read64(bar + NVME_REG_CMBMSC);
3946+
cmbsts = mmio_read32(bar + NVME_REG_CMBSTS);
39183947
pmrcap = mmio_read32(bar + NVME_REG_PMRCAP);
39193948
pmrctl = mmio_read32(bar + NVME_REG_PMRCTL);
39203949
pmrsts = mmio_read32(bar + NVME_REG_PMRSTS);
39213950
pmrebs = mmio_read32(bar + NVME_REG_PMREBS);
39223951
pmrswtp = mmio_read32(bar + NVME_REG_PMRSWTP);
3952+
pmrmsc = mmio_read64(bar + NVME_REG_PMRMSC);
39233953

39243954
if (human) {
39253955
if (cap != 0xffffffff) {
@@ -3976,6 +4006,12 @@ void show_ctrl_registers(void *bar, unsigned int mode, bool fabrics)
39764006
printf("bpmbl : %"PRIx64"\n", bpmbl);
39774007
show_registers_bpmbl(bpmbl);
39784008

4009+
printf("cmbmsc : %"PRIx64"\n", cmbmsc);
4010+
show_registers_cmbmsc(cmbmsc);
4011+
4012+
printf("cmbsts : %x\n", cmbsts);
4013+
show_registers_cmbsts(cmbsts);
4014+
39794015
printf("pmrcap : %x\n", pmrcap);
39804016
show_registers_pmrcap(pmrcap);
39814017

@@ -3990,6 +4026,9 @@ void show_ctrl_registers(void *bar, unsigned int mode, bool fabrics)
39904026

39914027
printf("pmrswtp : %x\n", pmrswtp);
39924028
show_registers_pmrswtp(pmrswtp);
4029+
4030+
printf("pmrmsc : %"PRIx64"\n", pmrmsc);
4031+
show_registers_pmrmsc(pmrmsc);
39934032
}
39944033
} else {
39954034
if (cap != 0xffffffff)
@@ -4013,6 +4052,14 @@ void show_ctrl_registers(void *bar, unsigned int mode, bool fabrics)
40134052
printf("bpinfo : %x\n", bpinfo);
40144053
printf("bprsel : %x\n", bprsel);
40154054
printf("bpmbl : %"PRIx64"\n", bpmbl);
4055+
printf("cmbmsc : %"PRIx64"\n", cmbmsc);
4056+
printf("cmbsts : %x\n", cmbsts);
4057+
printf("pmrcap : %x\n", pmrcap);
4058+
printf("pmrctl : %x\n", pmrctl);
4059+
printf("pmrsts : %x\n", pmrsts);
4060+
printf("pmrebs : %x\n", pmrebs);
4061+
printf("pmrswtp : %x\n", pmrswtp);
4062+
printf("pmrmsc : %"PRIx64"\n", pmrmsc);
40164063
}
40174064
}
40184065
}

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