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ikegami-tigaw
ikegami-t
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igaw
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ioctl: Move nvme_cmd_dword_fields definitions into header file
This is to be used the definitions by nvme-cli. Signed-off-by: Tokunori Ikegami <[email protected]>
1 parent 83373d8 commit ac74231

2 files changed

Lines changed: 119 additions & 119 deletions

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‎src/nvme/ioctl.c‎

Lines changed: 0 additions & 119 deletions
Original file line numberDiff line numberDiff line change
@@ -198,125 +198,6 @@ int nvme_admin_passthru(int fd, __u8 opcode, __u8 flags, __u16 rsvd,
198198
metadata, timeout_ms, result);
199199
}
200200

201-
enum nvme_cmd_dword_fields {
202-
NVME_DEVICE_SELF_TEST_CDW10_STC_SHIFT = 0,
203-
NVME_DEVICE_SELF_TEST_CDW10_STC_MASK = 0xf,
204-
NVME_DIRECTIVE_CDW11_DOPER_SHIFT = 0,
205-
NVME_DIRECTIVE_CDW11_DTYPE_SHIFT = 8,
206-
NVME_DIRECTIVE_CDW11_DPSEC_SHIFT = 16,
207-
NVME_DIRECTIVE_CDW11_DOPER_MASK = 0xff,
208-
NVME_DIRECTIVE_CDW11_DTYPE_MASK = 0xff,
209-
NVME_DIRECTIVE_CDW11_DPSEC_MASK = 0xffff,
210-
NVME_DIRECTIVE_SEND_IDENTIFY_CDW12_ENDIR_SHIFT = 0,
211-
NVME_DIRECTIVE_SEND_IDENTIFY_CDW12_DTYPE_SHIFT = 1,
212-
NVME_DIRECTIVE_SEND_IDENTIFY_CDW12_ENDIR_MASK = 0x1,
213-
NVME_DIRECTIVE_SEND_IDENTIFY_CDW12_DTYPE_MASK = 0x1,
214-
NVME_FW_COMMIT_CDW10_FS_SHIFT = 0,
215-
NVME_FW_COMMIT_CDW10_CA_SHIFT = 3,
216-
NVME_FW_COMMIT_CDW10_BPID_SHIFT = 31,
217-
NVME_FW_COMMIT_CDW10_FS_MASK = 0x7,
218-
NVME_FW_COMMIT_CDW10_CA_MASK = 0x7,
219-
NVME_FW_COMMIT_CDW10_BPID_MASK = 0x1,
220-
NVME_GET_FEATURES_CDW10_SEL_SHIFT = 8,
221-
NVME_GET_FEATURES_CDW10_SEL_MASK = 0x7,
222-
NVME_SET_FEATURES_CDW10_SAVE_SHIFT = 31,
223-
NVME_SET_FEATURES_CDW10_SAVE_MASK = 0x1,
224-
NVME_FEATURES_CDW10_FID_SHIFT = 0,
225-
NVME_FEATURES_CDW14_UUID_SHIFT = 0,
226-
NVME_FEATURES_CDW10_FID_MASK = 0xff,
227-
NVME_FEATURES_CDW14_UUID_MASK = 0x7f,
228-
NVME_LOG_CDW10_LID_SHIFT = 0,
229-
NVME_LOG_CDW10_LSP_SHIFT = 8,
230-
NVME_LOG_CDW10_RAE_SHIFT = 15,
231-
NVME_LOG_CDW10_NUMDL_SHIFT = 16,
232-
NVME_LOG_CDW11_NUMDU_SHIFT = 0,
233-
NVME_LOG_CDW11_LSI_SHIFT = 16,
234-
NVME_LOG_CDW14_UUID_SHIFT = 0,
235-
NVME_LOG_CDW14_CSI_SHIFT = 24,
236-
NVME_LOG_CDW14_OT_SHIFT = 23,
237-
NVME_LOG_CDW10_LID_MASK = 0xff,
238-
NVME_LOG_CDW10_LSP_MASK = 0x7f,
239-
NVME_LOG_CDW10_RAE_MASK = 0x1,
240-
NVME_LOG_CDW10_NUMDL_MASK = 0xffff,
241-
NVME_LOG_CDW11_NUMDU_MASK = 0xffff,
242-
NVME_LOG_CDW11_LSI_MASK = 0xffff,
243-
NVME_LOG_CDW14_UUID_MASK = 0x7f,
244-
NVME_LOG_CDW14_CSI_MASK = 0xff,
245-
NVME_LOG_CDW14_OT_MASK = 0x1,
246-
NVME_IDENTIFY_CDW10_CNS_SHIFT = 0,
247-
NVME_IDENTIFY_CDW10_CNTID_SHIFT = 16,
248-
NVME_IDENTIFY_CDW11_CNSSPECID_SHIFT = 0,
249-
NVME_IDENTIFY_CDW14_UUID_SHIFT = 0,
250-
NVME_IDENTIFY_CDW11_CSI_SHIFT = 24,
251-
NVME_IDENTIFY_CDW10_CNS_MASK = 0xff,
252-
NVME_IDENTIFY_CDW10_CNTID_MASK = 0xffff,
253-
NVME_IDENTIFY_CDW11_CNSSPECID_MASK = 0xffff,
254-
NVME_IDENTIFY_CDW14_UUID_MASK = 0x7f,
255-
NVME_IDENTIFY_CDW11_CSI_MASK = 0xff,
256-
NVME_NAMESPACE_ATTACH_CDW10_SEL_SHIFT = 0,
257-
NVME_NAMESPACE_ATTACH_CDW10_SEL_MASK = 0xf,
258-
NVME_NAMESPACE_MGMT_CDW10_SEL_SHIFT = 0,
259-
NVME_NAMESPACE_MGMT_CDW10_SEL_MASK = 0xf,
260-
NVME_NAMESPACE_MGMT_CDW11_CSI_SHIFT = 24,
261-
NVME_NAMESPACE_MGMT_CDW11_CSI_MASK = 0xff,
262-
NVME_VIRT_MGMT_CDW10_ACT_SHIFT = 0,
263-
NVME_VIRT_MGMT_CDW10_RT_SHIFT = 8,
264-
NVME_VIRT_MGMT_CDW10_CNTLID_SHIFT = 16,
265-
NVME_VIRT_MGMT_CDW11_NR_SHIFT = 0,
266-
NVME_VIRT_MGMT_CDW10_ACT_MASK = 0xf,
267-
NVME_VIRT_MGMT_CDW10_RT_MASK = 0x7,
268-
NVME_VIRT_MGMT_CDW10_CNTLID_MASK = 0xffff,
269-
NVME_VIRT_MGMT_CDW11_NR_MASK = 0xffff,
270-
NVME_FORMAT_CDW10_LBAF_SHIFT = 0,
271-
NVME_FORMAT_CDW10_MSET_SHIFT = 4,
272-
NVME_FORMAT_CDW10_PI_SHIFT = 5,
273-
NVME_FORMAT_CDW10_PIL_SHIFT = 8,
274-
NVME_FORMAT_CDW10_SES_SHIFT = 9,
275-
NVME_FORMAT_CDW10_LBAFU_SHIFT = 12,
276-
NVME_FORMAT_CDW10_LBAF_MASK = 0xf,
277-
NVME_FORMAT_CDW10_MSET_MASK = 0x1,
278-
NVME_FORMAT_CDW10_PI_MASK = 0x7,
279-
NVME_FORMAT_CDW10_PIL_MASK = 0x1,
280-
NVME_FORMAT_CDW10_SES_MASK = 0x7,
281-
NVME_FORMAT_CDW10_LBAFU_MASK = 0x3,
282-
NVME_SANITIZE_CDW10_SANACT_SHIFT = 0,
283-
NVME_SANITIZE_CDW10_AUSE_SHIFT = 3,
284-
NVME_SANITIZE_CDW10_OWPASS_SHIFT = 4,
285-
NVME_SANITIZE_CDW10_OIPBP_SHIFT = 8,
286-
NVME_SANITIZE_CDW10_NODAS_SHIFT = 9,
287-
NVME_SANITIZE_CDW10_SANACT_MASK = 0x7,
288-
NVME_SANITIZE_CDW10_AUSE_MASK = 0x1,
289-
NVME_SANITIZE_CDW10_OWPASS_MASK = 0xf,
290-
NVME_SANITIZE_CDW10_OIPBP_MASK = 0x1,
291-
NVME_SANITIZE_CDW10_NODAS_MASK = 0x1,
292-
NVME_SECURITY_NSSF_SHIFT = 0,
293-
NVME_SECURITY_SPSP0_SHIFT = 8,
294-
NVME_SECURITY_SPSP1_SHIFT = 16,
295-
NVME_SECURITY_SECP_SHIFT = 24,
296-
NVME_SECURITY_NSSF_MASK = 0xff,
297-
NVME_SECURITY_SPSP0_MASK = 0xff,
298-
NVME_SECURITY_SPSP1_MASK = 0xff,
299-
NVME_SECURITY_SECP_MASK = 0xffff,
300-
NVME_GET_LBA_STATUS_CDW13_RL_SHIFT = 0,
301-
NVME_GET_LBA_STATUS_CDW13_ATYPE_SHIFT = 24,
302-
NVME_GET_LBA_STATUS_CDW13_RL_MASK = 0xffff,
303-
NVME_GET_LBA_STATUS_CDW13_ATYPE_MASK = 0xff,
304-
NVME_ZNS_MGMT_SEND_ZSASO_SHIFT = 9,
305-
NVME_ZNS_MGMT_SEND_ZSASO_MASK = 0x1,
306-
NVME_ZNS_MGMT_SEND_SEL_SHIFT = 8,
307-
NVME_ZNS_MGMT_SEND_SEL_MASK = 0x1,
308-
NVME_ZNS_MGMT_SEND_ZSA_SHIFT = 0,
309-
NVME_ZNS_MGMT_SEND_ZSA_MASK = 0xff,
310-
NVME_ZNS_MGMT_RECV_ZRA_SHIFT = 0,
311-
NVME_ZNS_MGMT_RECV_ZRA_MASK = 0xff,
312-
NVME_ZNS_MGMT_RECV_ZRASF_SHIFT = 8,
313-
NVME_ZNS_MGMT_RECV_ZRASF_MASK = 0xff,
314-
NVME_ZNS_MGMT_RECV_ZRAS_FEAT_SHIFT = 16,
315-
NVME_ZNS_MGMT_RECV_ZRAS_FEAT_MASK = 0x1,
316-
NVME_DIM_TAS_SHIFT = 0,
317-
NVME_DIM_TAS_MASK = 0xF,
318-
};
319-
320201
enum features {
321202
NVME_FEATURES_ARBITRATION_BURST_SHIFT = 0,
322203
NVME_FEATURES_ARBITRATION_LPW_SHIFT = 8,

‎src/nvme/ioctl.h‎

Lines changed: 119 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -199,6 +199,125 @@ struct nvme_uring_cmd {
199199
t + p; \
200200
})
201201

202+
enum nvme_cmd_dword_fields {
203+
NVME_DEVICE_SELF_TEST_CDW10_STC_SHIFT = 0,
204+
NVME_DEVICE_SELF_TEST_CDW10_STC_MASK = 0xf,
205+
NVME_DIRECTIVE_CDW11_DOPER_SHIFT = 0,
206+
NVME_DIRECTIVE_CDW11_DTYPE_SHIFT = 8,
207+
NVME_DIRECTIVE_CDW11_DPSEC_SHIFT = 16,
208+
NVME_DIRECTIVE_CDW11_DOPER_MASK = 0xff,
209+
NVME_DIRECTIVE_CDW11_DTYPE_MASK = 0xff,
210+
NVME_DIRECTIVE_CDW11_DPSEC_MASK = 0xffff,
211+
NVME_DIRECTIVE_SEND_IDENTIFY_CDW12_ENDIR_SHIFT = 0,
212+
NVME_DIRECTIVE_SEND_IDENTIFY_CDW12_DTYPE_SHIFT = 1,
213+
NVME_DIRECTIVE_SEND_IDENTIFY_CDW12_ENDIR_MASK = 0x1,
214+
NVME_DIRECTIVE_SEND_IDENTIFY_CDW12_DTYPE_MASK = 0x1,
215+
NVME_FW_COMMIT_CDW10_FS_SHIFT = 0,
216+
NVME_FW_COMMIT_CDW10_CA_SHIFT = 3,
217+
NVME_FW_COMMIT_CDW10_BPID_SHIFT = 31,
218+
NVME_FW_COMMIT_CDW10_FS_MASK = 0x7,
219+
NVME_FW_COMMIT_CDW10_CA_MASK = 0x7,
220+
NVME_FW_COMMIT_CDW10_BPID_MASK = 0x1,
221+
NVME_GET_FEATURES_CDW10_SEL_SHIFT = 8,
222+
NVME_GET_FEATURES_CDW10_SEL_MASK = 0x7,
223+
NVME_SET_FEATURES_CDW10_SAVE_SHIFT = 31,
224+
NVME_SET_FEATURES_CDW10_SAVE_MASK = 0x1,
225+
NVME_FEATURES_CDW10_FID_SHIFT = 0,
226+
NVME_FEATURES_CDW14_UUID_SHIFT = 0,
227+
NVME_FEATURES_CDW10_FID_MASK = 0xff,
228+
NVME_FEATURES_CDW14_UUID_MASK = 0x7f,
229+
NVME_LOG_CDW10_LID_SHIFT = 0,
230+
NVME_LOG_CDW10_LSP_SHIFT = 8,
231+
NVME_LOG_CDW10_RAE_SHIFT = 15,
232+
NVME_LOG_CDW10_NUMDL_SHIFT = 16,
233+
NVME_LOG_CDW11_NUMDU_SHIFT = 0,
234+
NVME_LOG_CDW11_LSI_SHIFT = 16,
235+
NVME_LOG_CDW14_UUID_SHIFT = 0,
236+
NVME_LOG_CDW14_CSI_SHIFT = 24,
237+
NVME_LOG_CDW14_OT_SHIFT = 23,
238+
NVME_LOG_CDW10_LID_MASK = 0xff,
239+
NVME_LOG_CDW10_LSP_MASK = 0x7f,
240+
NVME_LOG_CDW10_RAE_MASK = 0x1,
241+
NVME_LOG_CDW10_NUMDL_MASK = 0xffff,
242+
NVME_LOG_CDW11_NUMDU_MASK = 0xffff,
243+
NVME_LOG_CDW11_LSI_MASK = 0xffff,
244+
NVME_LOG_CDW14_UUID_MASK = 0x7f,
245+
NVME_LOG_CDW14_CSI_MASK = 0xff,
246+
NVME_LOG_CDW14_OT_MASK = 0x1,
247+
NVME_IDENTIFY_CDW10_CNS_SHIFT = 0,
248+
NVME_IDENTIFY_CDW10_CNTID_SHIFT = 16,
249+
NVME_IDENTIFY_CDW11_CNSSPECID_SHIFT = 0,
250+
NVME_IDENTIFY_CDW14_UUID_SHIFT = 0,
251+
NVME_IDENTIFY_CDW11_CSI_SHIFT = 24,
252+
NVME_IDENTIFY_CDW10_CNS_MASK = 0xff,
253+
NVME_IDENTIFY_CDW10_CNTID_MASK = 0xffff,
254+
NVME_IDENTIFY_CDW11_CNSSPECID_MASK = 0xffff,
255+
NVME_IDENTIFY_CDW14_UUID_MASK = 0x7f,
256+
NVME_IDENTIFY_CDW11_CSI_MASK = 0xff,
257+
NVME_NAMESPACE_ATTACH_CDW10_SEL_SHIFT = 0,
258+
NVME_NAMESPACE_ATTACH_CDW10_SEL_MASK = 0xf,
259+
NVME_NAMESPACE_MGMT_CDW10_SEL_SHIFT = 0,
260+
NVME_NAMESPACE_MGMT_CDW10_SEL_MASK = 0xf,
261+
NVME_NAMESPACE_MGMT_CDW11_CSI_SHIFT = 24,
262+
NVME_NAMESPACE_MGMT_CDW11_CSI_MASK = 0xff,
263+
NVME_VIRT_MGMT_CDW10_ACT_SHIFT = 0,
264+
NVME_VIRT_MGMT_CDW10_RT_SHIFT = 8,
265+
NVME_VIRT_MGMT_CDW10_CNTLID_SHIFT = 16,
266+
NVME_VIRT_MGMT_CDW11_NR_SHIFT = 0,
267+
NVME_VIRT_MGMT_CDW10_ACT_MASK = 0xf,
268+
NVME_VIRT_MGMT_CDW10_RT_MASK = 0x7,
269+
NVME_VIRT_MGMT_CDW10_CNTLID_MASK = 0xffff,
270+
NVME_VIRT_MGMT_CDW11_NR_MASK = 0xffff,
271+
NVME_FORMAT_CDW10_LBAF_SHIFT = 0,
272+
NVME_FORMAT_CDW10_MSET_SHIFT = 4,
273+
NVME_FORMAT_CDW10_PI_SHIFT = 5,
274+
NVME_FORMAT_CDW10_PIL_SHIFT = 8,
275+
NVME_FORMAT_CDW10_SES_SHIFT = 9,
276+
NVME_FORMAT_CDW10_LBAFU_SHIFT = 12,
277+
NVME_FORMAT_CDW10_LBAF_MASK = 0xf,
278+
NVME_FORMAT_CDW10_MSET_MASK = 0x1,
279+
NVME_FORMAT_CDW10_PI_MASK = 0x7,
280+
NVME_FORMAT_CDW10_PIL_MASK = 0x1,
281+
NVME_FORMAT_CDW10_SES_MASK = 0x7,
282+
NVME_FORMAT_CDW10_LBAFU_MASK = 0x3,
283+
NVME_SANITIZE_CDW10_SANACT_SHIFT = 0,
284+
NVME_SANITIZE_CDW10_AUSE_SHIFT = 3,
285+
NVME_SANITIZE_CDW10_OWPASS_SHIFT = 4,
286+
NVME_SANITIZE_CDW10_OIPBP_SHIFT = 8,
287+
NVME_SANITIZE_CDW10_NODAS_SHIFT = 9,
288+
NVME_SANITIZE_CDW10_SANACT_MASK = 0x7,
289+
NVME_SANITIZE_CDW10_AUSE_MASK = 0x1,
290+
NVME_SANITIZE_CDW10_OWPASS_MASK = 0xf,
291+
NVME_SANITIZE_CDW10_OIPBP_MASK = 0x1,
292+
NVME_SANITIZE_CDW10_NODAS_MASK = 0x1,
293+
NVME_SECURITY_NSSF_SHIFT = 0,
294+
NVME_SECURITY_SPSP0_SHIFT = 8,
295+
NVME_SECURITY_SPSP1_SHIFT = 16,
296+
NVME_SECURITY_SECP_SHIFT = 24,
297+
NVME_SECURITY_NSSF_MASK = 0xff,
298+
NVME_SECURITY_SPSP0_MASK = 0xff,
299+
NVME_SECURITY_SPSP1_MASK = 0xff,
300+
NVME_SECURITY_SECP_MASK = 0xffff,
301+
NVME_GET_LBA_STATUS_CDW13_RL_SHIFT = 0,
302+
NVME_GET_LBA_STATUS_CDW13_ATYPE_SHIFT = 24,
303+
NVME_GET_LBA_STATUS_CDW13_RL_MASK = 0xffff,
304+
NVME_GET_LBA_STATUS_CDW13_ATYPE_MASK = 0xff,
305+
NVME_ZNS_MGMT_SEND_ZSASO_SHIFT = 9,
306+
NVME_ZNS_MGMT_SEND_ZSASO_MASK = 0x1,
307+
NVME_ZNS_MGMT_SEND_SEL_SHIFT = 8,
308+
NVME_ZNS_MGMT_SEND_SEL_MASK = 0x1,
309+
NVME_ZNS_MGMT_SEND_ZSA_SHIFT = 0,
310+
NVME_ZNS_MGMT_SEND_ZSA_MASK = 0xff,
311+
NVME_ZNS_MGMT_RECV_ZRA_SHIFT = 0,
312+
NVME_ZNS_MGMT_RECV_ZRA_MASK = 0xff,
313+
NVME_ZNS_MGMT_RECV_ZRASF_SHIFT = 8,
314+
NVME_ZNS_MGMT_RECV_ZRASF_MASK = 0xff,
315+
NVME_ZNS_MGMT_RECV_ZRAS_FEAT_SHIFT = 16,
316+
NVME_ZNS_MGMT_RECV_ZRAS_FEAT_MASK = 0x1,
317+
NVME_DIM_TAS_SHIFT = 0,
318+
NVME_DIM_TAS_MASK = 0xF,
319+
};
320+
202321
/**
203322
* nvme_submit_admin_passthru64() - Submit a 64-bit nvme passthrough admin
204323
* command

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