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torvaldstorvalds
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Merge tag 'drm-next-2025-08-08' of https://gitlab.freedesktop.org/drm/kernel
Pull drm fixes from Dave Airlie: "This is the fixes that built up in the merge window, mostly amdgpu and xe with one i915 display fix, seems like things are pretty good for rc1. i915: - DP LPFS fixes xe: - SRIOV: PF fixes and removal of need of module param - Fix driver unbind around Devcoredump - Mark xe driver as BROKEN if kernel page size is not 4kB amdgpu: - GC 9.5.0 fixes - SMU fix - DCE 6 DC fixes - mmhub client ID fixes - VRR fix - Backlight fix - UserQ fix - Legacy reset fix - Misc fixes amdkfd: - CRIU fix - Debugfs fix" * tag 'drm-next-2025-08-08' of https://gitlab.freedesktop.org/drm/kernel: (28 commits) drm/amdgpu: add missing vram lost check for LEGACY RESET drm/amdgpu/discovery: fix fw based ip discovery drm/amdkfd: Destroy KFD debugfs after destroy KFD wq amdgpu/amdgpu_discovery: increase timeout limit for IFWI init drm/amdgpu: Update SDMA firmware version check for user queue support drm/amdgpu: Add NULL check for asic_funcs drm/amd/display: Revert "drm/amd/display: Fix AMDGPU_MAX_BL_LEVEL value" drm/amd/display: fix a Null pointer dereference vulnerability drm/amd/display: Add primary plane to commits for correct VRR handling drm/amdgpu: update mmhub 3.3 client id mappings drm/amdgpu: update mmhub 3.0.1 client id mappings drm/amdgpu: Retain job->vm in amdgpu_job_prepare_job drm/amd/display: Fix DCE 6.0 and 6.4 PLL programming. drm/amd/display: Don't overwrite dce60_clk_mgr drm/amdkfd: Fix checkpoint-restore on multi-xcc drm/amd: Restore cached manual clock settings during resume drm/amd: Restore cached power limit during resume drm/amdgpu: Update external revid for GC v9.5.0 drm/amdgpu: Update supported modes for GC v9.5.0 Mark xe driver as BROKEN if kernel page size is not 4kB ...
2 parents 2939a79 + 64c6275 commit ffe8ac9

31 files changed

Lines changed: 448 additions & 133 deletions

‎drivers/gpu/drm/amd/amdgpu/amdgpu_device.c‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -2570,9 +2570,6 @@ static int amdgpu_device_parse_gpu_info_fw(struct amdgpu_device *adev)
25702570

25712571
adev->firmware.gpu_info_fw = NULL;
25722572

2573-
if (adev->mman.discovery_bin)
2574-
return 0;
2575-
25762573
switch (adev->asic_type) {
25772574
default:
25782575
return 0;
@@ -2594,6 +2591,8 @@ static int amdgpu_device_parse_gpu_info_fw(struct amdgpu_device *adev)
25942591
chip_name = "arcturus";
25952592
break;
25962593
case CHIP_NAVI12:
2594+
if (adev->mman.discovery_bin)
2595+
return 0;
25972596
chip_name = "navi12";
25982597
break;
25992598
}
@@ -3271,6 +3270,7 @@ static bool amdgpu_device_check_vram_lost(struct amdgpu_device *adev)
32713270
* always assumed to be lost.
32723271
*/
32733272
switch (amdgpu_asic_reset_method(adev)) {
3273+
case AMD_RESET_METHOD_LEGACY:
32743274
case AMD_RESET_METHOD_LINK:
32753275
case AMD_RESET_METHOD_BACO:
32763276
case AMD_RESET_METHOD_MODE1:

‎drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c‎

Lines changed: 41 additions & 35 deletions
Original file line numberDiff line numberDiff line change
@@ -276,15 +276,15 @@ static int amdgpu_discovery_read_binary_from_mem(struct amdgpu_device *adev,
276276
u32 msg;
277277

278278
if (!amdgpu_sriov_vf(adev)) {
279-
/* It can take up to a second for IFWI init to complete on some dGPUs,
279+
/* It can take up to two second for IFWI init to complete on some dGPUs,
280280
* but generally it should be in the 60-100ms range. Normally this starts
281281
* as soon as the device gets power so by the time the OS loads this has long
282282
* completed. However, when a card is hotplugged via e.g., USB4, we need to
283283
* wait for this to complete. Once the C2PMSG is updated, we can
284284
* continue.
285285
*/
286286

287-
for (i = 0; i < 1000; i++) {
287+
for (i = 0; i < 2000; i++) {
288288
msg = RREG32(mmMP0_SMN_C2PMSG_33);
289289
if (msg & 0x80000000)
290290
break;
@@ -2555,40 +2555,11 @@ int amdgpu_discovery_set_ip_blocks(struct amdgpu_device *adev)
25552555

25562556
switch (adev->asic_type) {
25572557
case CHIP_VEGA10:
2558-
case CHIP_VEGA12:
2559-
case CHIP_RAVEN:
2560-
case CHIP_VEGA20:
2561-
case CHIP_ARCTURUS:
2562-
case CHIP_ALDEBARAN:
2563-
/* this is not fatal. We have a fallback below
2564-
* if the new firmwares are not present. some of
2565-
* this will be overridden below to keep things
2566-
* consistent with the current behavior.
2558+
/* This is not fatal. We only need the discovery
2559+
* binary for sysfs. We don't need it for a
2560+
* functional system.
25672561
*/
2568-
r = amdgpu_discovery_reg_base_init(adev);
2569-
if (!r) {
2570-
amdgpu_discovery_harvest_ip(adev);
2571-
amdgpu_discovery_get_gfx_info(adev);
2572-
amdgpu_discovery_get_mall_info(adev);
2573-
amdgpu_discovery_get_vcn_info(adev);
2574-
}
2575-
break;
2576-
default:
2577-
r = amdgpu_discovery_reg_base_init(adev);
2578-
if (r) {
2579-
drm_err(&adev->ddev, "discovery failed: %d\n", r);
2580-
return r;
2581-
}
2582-
2583-
amdgpu_discovery_harvest_ip(adev);
2584-
amdgpu_discovery_get_gfx_info(adev);
2585-
amdgpu_discovery_get_mall_info(adev);
2586-
amdgpu_discovery_get_vcn_info(adev);
2587-
break;
2588-
}
2589-
2590-
switch (adev->asic_type) {
2591-
case CHIP_VEGA10:
2562+
amdgpu_discovery_init(adev);
25922563
vega10_reg_base_init(adev);
25932564
adev->sdma.num_instances = 2;
25942565
adev->gmc.num_umc = 4;
@@ -2611,6 +2582,11 @@ int amdgpu_discovery_set_ip_blocks(struct amdgpu_device *adev)
26112582
adev->ip_versions[DCI_HWIP][0] = IP_VERSION(12, 0, 0);
26122583
break;
26132584
case CHIP_VEGA12:
2585+
/* This is not fatal. We only need the discovery
2586+
* binary for sysfs. We don't need it for a
2587+
* functional system.
2588+
*/
2589+
amdgpu_discovery_init(adev);
26142590
vega10_reg_base_init(adev);
26152591
adev->sdma.num_instances = 2;
26162592
adev->gmc.num_umc = 4;
@@ -2633,6 +2609,11 @@ int amdgpu_discovery_set_ip_blocks(struct amdgpu_device *adev)
26332609
adev->ip_versions[DCI_HWIP][0] = IP_VERSION(12, 0, 1);
26342610
break;
26352611
case CHIP_RAVEN:
2612+
/* This is not fatal. We only need the discovery
2613+
* binary for sysfs. We don't need it for a
2614+
* functional system.
2615+
*/
2616+
amdgpu_discovery_init(adev);
26362617
vega10_reg_base_init(adev);
26372618
adev->sdma.num_instances = 1;
26382619
adev->vcn.num_vcn_inst = 1;
@@ -2674,6 +2655,11 @@ int amdgpu_discovery_set_ip_blocks(struct amdgpu_device *adev)
26742655
}
26752656
break;
26762657
case CHIP_VEGA20:
2658+
/* This is not fatal. We only need the discovery
2659+
* binary for sysfs. We don't need it for a
2660+
* functional system.
2661+
*/
2662+
amdgpu_discovery_init(adev);
26772663
vega20_reg_base_init(adev);
26782664
adev->sdma.num_instances = 2;
26792665
adev->gmc.num_umc = 8;
@@ -2697,6 +2683,11 @@ int amdgpu_discovery_set_ip_blocks(struct amdgpu_device *adev)
26972683
adev->ip_versions[DCI_HWIP][0] = IP_VERSION(12, 1, 0);
26982684
break;
26992685
case CHIP_ARCTURUS:
2686+
/* This is not fatal. We only need the discovery
2687+
* binary for sysfs. We don't need it for a
2688+
* functional system.
2689+
*/
2690+
amdgpu_discovery_init(adev);
27002691
arct_reg_base_init(adev);
27012692
adev->sdma.num_instances = 8;
27022693
adev->vcn.num_vcn_inst = 2;
@@ -2725,6 +2716,11 @@ int amdgpu_discovery_set_ip_blocks(struct amdgpu_device *adev)
27252716
adev->ip_versions[UVD_HWIP][1] = IP_VERSION(2, 5, 0);
27262717
break;
27272718
case CHIP_ALDEBARAN:
2719+
/* This is not fatal. We only need the discovery
2720+
* binary for sysfs. We don't need it for a
2721+
* functional system.
2722+
*/
2723+
amdgpu_discovery_init(adev);
27282724
aldebaran_reg_base_init(adev);
27292725
adev->sdma.num_instances = 5;
27302726
adev->vcn.num_vcn_inst = 2;
@@ -2751,6 +2747,16 @@ int amdgpu_discovery_set_ip_blocks(struct amdgpu_device *adev)
27512747
adev->ip_versions[XGMI_HWIP][0] = IP_VERSION(6, 1, 0);
27522748
break;
27532749
default:
2750+
r = amdgpu_discovery_reg_base_init(adev);
2751+
if (r) {
2752+
drm_err(&adev->ddev, "discovery failed: %d\n", r);
2753+
return r;
2754+
}
2755+
2756+
amdgpu_discovery_harvest_ip(adev);
2757+
amdgpu_discovery_get_gfx_info(adev);
2758+
amdgpu_discovery_get_mall_info(adev);
2759+
amdgpu_discovery_get_vcn_info(adev);
27542760
break;
27552761
}
27562762

‎drivers/gpu/drm/amd/amdgpu/amdgpu_job.c‎

Lines changed: 0 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -365,13 +365,6 @@ amdgpu_job_prepare_job(struct drm_sched_job *sched_job,
365365
dev_err(ring->adev->dev, "Error getting VM ID (%d)\n", r);
366366
goto error;
367367
}
368-
/*
369-
* The VM structure might be released after the VMID is
370-
* assigned, we had multiple problems with people trying to use
371-
* the VM pointer so better set it to NULL.
372-
*/
373-
if (!fence)
374-
job->vm = NULL;
375368
return fence;
376369
}
377370

‎drivers/gpu/drm/amd/amdgpu/amdgpu_nbio.c‎

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -55,7 +55,8 @@ u64 amdgpu_nbio_get_pcie_replay_count(struct amdgpu_device *adev)
5555

5656
bool amdgpu_nbio_is_replay_cnt_supported(struct amdgpu_device *adev)
5757
{
58-
if (amdgpu_sriov_vf(adev) || !adev->asic_funcs->get_pcie_replay_count ||
58+
if (amdgpu_sriov_vf(adev) || !adev->asic_funcs ||
59+
!adev->asic_funcs->get_pcie_replay_count ||
5960
(!adev->nbio.funcs || !adev->nbio.funcs->get_pcie_replay_count))
6061
return false;
6162

‎drivers/gpu/drm/amd/amdgpu/aqua_vanjaram.c‎

Lines changed: 4 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -227,6 +227,7 @@ static int __aqua_vanjaram_get_px_mode_info(struct amdgpu_xcp_mgr *xcp_mgr,
227227
uint16_t *nps_modes)
228228
{
229229
struct amdgpu_device *adev = xcp_mgr->adev;
230+
uint32_t gc_ver = amdgpu_ip_version(adev, GC_HWIP, 0);
230231

231232
if (!num_xcp || !nps_modes || !(xcp_mgr->supp_xcp_modes & BIT(px_mode)))
232233
return -EINVAL;
@@ -250,12 +251,14 @@ static int __aqua_vanjaram_get_px_mode_info(struct amdgpu_xcp_mgr *xcp_mgr,
250251
*num_xcp = 4;
251252
*nps_modes = BIT(AMDGPU_NPS1_PARTITION_MODE) |
252253
BIT(AMDGPU_NPS4_PARTITION_MODE);
254+
if (gc_ver == IP_VERSION(9, 5, 0))
255+
*nps_modes |= BIT(AMDGPU_NPS2_PARTITION_MODE);
253256
break;
254257
case AMDGPU_CPX_PARTITION_MODE:
255258
*num_xcp = NUM_XCC(adev->gfx.xcc_mask);
256259
*nps_modes = BIT(AMDGPU_NPS1_PARTITION_MODE) |
257260
BIT(AMDGPU_NPS4_PARTITION_MODE);
258-
if (amdgpu_sriov_vf(adev))
261+
if (gc_ver == IP_VERSION(9, 5, 0))
259262
*nps_modes |= BIT(AMDGPU_NPS2_PARTITION_MODE);
260263
break;
261264
default:

‎drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_1.c‎

Lines changed: 32 additions & 25 deletions
Original file line numberDiff line numberDiff line change
@@ -36,40 +36,47 @@
3636

3737
static const char *mmhub_client_ids_v3_0_1[][2] = {
3838
[0][0] = "VMC",
39+
[1][0] = "ISPXT",
40+
[2][0] = "ISPIXT",
3941
[4][0] = "DCEDMC",
4042
[5][0] = "DCEVGA",
4143
[6][0] = "MP0",
4244
[7][0] = "MP1",
43-
[8][0] = "MPIO",
44-
[16][0] = "HDP",
45-
[17][0] = "LSDMA",
46-
[18][0] = "JPEG",
47-
[19][0] = "VCNU0",
48-
[21][0] = "VSCH",
49-
[22][0] = "VCNU1",
50-
[23][0] = "VCN1",
51-
[32+20][0] = "VCN0",
52-
[2][1] = "DBGUNBIO",
45+
[8][0] = "MPM",
46+
[12][0] = "ISPTNR",
47+
[14][0] = "ISPCRD0",
48+
[15][0] = "ISPCRD1",
49+
[16][0] = "ISPCRD2",
50+
[22][0] = "HDP",
51+
[23][0] = "LSDMA",
52+
[24][0] = "JPEG",
53+
[27][0] = "VSCH",
54+
[28][0] = "VCNU",
55+
[29][0] = "VCN",
56+
[1][1] = "ISPXT",
57+
[2][1] = "ISPIXT",
5358
[3][1] = "DCEDWB",
5459
[4][1] = "DCEDMC",
5560
[5][1] = "DCEVGA",
5661
[6][1] = "MP0",
5762
[7][1] = "MP1",
58-
[8][1] = "MPIO",
59-
[10][1] = "DBGU0",
60-
[11][1] = "DBGU1",
61-
[12][1] = "DBGU2",
62-
[13][1] = "DBGU3",
63-
[14][1] = "XDP",
64-
[15][1] = "OSSSYS",
65-
[16][1] = "HDP",
66-
[17][1] = "LSDMA",
67-
[18][1] = "JPEG",
68-
[19][1] = "VCNU0",
69-
[20][1] = "VCN0",
70-
[21][1] = "VSCH",
71-
[22][1] = "VCNU1",
72-
[23][1] = "VCN1",
63+
[8][1] = "MPM",
64+
[10][1] = "ISPMWR0",
65+
[11][1] = "ISPMWR1",
66+
[12][1] = "ISPTNR",
67+
[13][1] = "ISPSWR",
68+
[14][1] = "ISPCWR0",
69+
[15][1] = "ISPCWR1",
70+
[16][1] = "ISPCWR2",
71+
[17][1] = "ISPCWR3",
72+
[18][1] = "XDP",
73+
[21][1] = "OSSSYS",
74+
[22][1] = "HDP",
75+
[23][1] = "LSDMA",
76+
[24][1] = "JPEG",
77+
[27][1] = "VSCH",
78+
[28][1] = "VCNU",
79+
[29][1] = "VCN",
7380
};
7481

7582
static uint32_t mmhub_v3_0_1_get_invalidate_req(unsigned int vmid,

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