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698 | 698 | compatible = "renesas,scif-r8a78000", |
699 | 699 | "renesas,rcar-gen5-scif", "renesas,scif"; |
700 | 700 | reg = <0 0xc0700000 0 0x40>; |
701 | | - interrupts = <GIC_SPI 4074 IRQ_TYPE_LEVEL_HIGH>; |
| 701 | + interrupts = <GIC_ESPI 10 IRQ_TYPE_LEVEL_HIGH>; |
702 | 702 | clocks = <&dummy_clk_sgasyncd16>, <&dummy_clk_sgasyncd16>, <&scif_clk>; |
703 | 703 | clock-names = "fck", "brg_int", "scif_clk"; |
704 | 704 | status = "disabled"; |
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708 | 708 | compatible = "renesas,scif-r8a78000", |
709 | 709 | "renesas,rcar-gen5-scif", "renesas,scif"; |
710 | 710 | reg = <0 0xc0704000 0 0x40>; |
711 | | - interrupts = <GIC_SPI 4075 IRQ_TYPE_LEVEL_HIGH>; |
| 711 | + interrupts = <GIC_ESPI 11 IRQ_TYPE_LEVEL_HIGH>; |
712 | 712 | clocks = <&dummy_clk_sgasyncd16>, <&dummy_clk_sgasyncd16>, <&scif_clk>; |
713 | 713 | clock-names = "fck", "brg_int", "scif_clk"; |
714 | 714 | status = "disabled"; |
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718 | 718 | compatible = "renesas,scif-r8a78000", |
719 | 719 | "renesas,rcar-gen5-scif", "renesas,scif"; |
720 | 720 | reg = <0 0xc0708000 0 0x40>; |
721 | | - interrupts = <GIC_SPI 4076 IRQ_TYPE_LEVEL_HIGH>; |
| 721 | + interrupts = <GIC_ESPI 12 IRQ_TYPE_LEVEL_HIGH>; |
722 | 722 | clocks = <&dummy_clk_sgasyncd16>, <&dummy_clk_sgasyncd16>, <&scif_clk>; |
723 | 723 | clock-names = "fck", "brg_int", "scif_clk"; |
724 | 724 | status = "disabled"; |
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728 | 728 | compatible = "renesas,scif-r8a78000", |
729 | 729 | "renesas,rcar-gen5-scif", "renesas,scif"; |
730 | 730 | reg = <0 0xc070c000 0 0x40>; |
731 | | - interrupts = <GIC_SPI 4077 IRQ_TYPE_LEVEL_HIGH>; |
| 731 | + interrupts = <GIC_ESPI 13 IRQ_TYPE_LEVEL_HIGH>; |
732 | 732 | clocks = <&dummy_clk_sgasyncd16>, <&dummy_clk_sgasyncd16>, <&scif_clk>; |
733 | 733 | clock-names = "fck", "brg_int", "scif_clk"; |
734 | 734 | status = "disabled"; |
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738 | 738 | compatible = "renesas,hscif-r8a78000", |
739 | 739 | "renesas,rcar-gen5-hscif", "renesas,hscif"; |
740 | 740 | reg = <0 0xc0710000 0 0x60>; |
741 | | - interrupts = <GIC_SPI 4078 IRQ_TYPE_LEVEL_HIGH>; |
| 741 | + interrupts = <GIC_ESPI 14 IRQ_TYPE_LEVEL_HIGH>; |
742 | 742 | clocks = <&dummy_clk_sgasyncd4>, <&dummy_clk_sgasyncd4>, <&scif_clk>; |
743 | 743 | clock-names = "fck", "brg_int", "scif_clk"; |
744 | 744 | status = "disabled"; |
|
748 | 748 | compatible = "renesas,hscif-r8a78000", |
749 | 749 | "renesas,rcar-gen5-hscif", "renesas,hscif"; |
750 | 750 | reg = <0 0xc0714000 0 0x60>; |
751 | | - interrupts = <GIC_SPI 4079 IRQ_TYPE_LEVEL_HIGH>; |
| 751 | + interrupts = <GIC_ESPI 15 IRQ_TYPE_LEVEL_HIGH>; |
752 | 752 | clocks = <&dummy_clk_sgasyncd4>, <&dummy_clk_sgasyncd4>, <&scif_clk>; |
753 | 753 | clock-names = "fck", "brg_int", "scif_clk"; |
754 | 754 | status = "disabled"; |
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758 | 758 | compatible = "renesas,hscif-r8a78000", |
759 | 759 | "renesas,rcar-gen5-hscif", "renesas,hscif"; |
760 | 760 | reg = <0 0xc0718000 0 0x60>; |
761 | | - interrupts = <GIC_SPI 4080 IRQ_TYPE_LEVEL_HIGH>; |
| 761 | + interrupts = <GIC_ESPI 16 IRQ_TYPE_LEVEL_HIGH>; |
762 | 762 | clocks = <&dummy_clk_sgasyncd4>, <&dummy_clk_sgasyncd4>, <&scif_clk>; |
763 | 763 | clock-names = "fck", "brg_int", "scif_clk"; |
764 | 764 | status = "disabled"; |
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768 | 768 | compatible = "renesas,hscif-r8a78000", |
769 | 769 | "renesas,rcar-gen5-hscif", "renesas,hscif"; |
770 | 770 | reg = <0 0xc071c000 0 0x60>; |
771 | | - interrupts = <GIC_SPI 4081 IRQ_TYPE_LEVEL_HIGH>; |
| 771 | + interrupts = <GIC_ESPI 17 IRQ_TYPE_LEVEL_HIGH>; |
772 | 772 | clocks = <&dummy_clk_sgasyncd4>, <&dummy_clk_sgasyncd4>, <&scif_clk>; |
773 | 773 | clock-names = "fck", "brg_int", "scif_clk"; |
774 | 774 | status = "disabled"; |
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