drm/xe: move DPT l2 flush to a more sensible place

Only need the flush for DPT host updates here. Normal GGTT updates don't
need special flush.

Fixes: 01570b4 ("drm/xe/bmg: implement Wa_16023588340")
Signed-off-by: Matthew Auld <[email protected]>
Cc: Maarten Lankhorst <[email protected]>
Cc: [email protected] # v6.12+
Reviewed-by: Ville Syrjälä <[email protected]>
Reviewed-by: Lucas De Marchi <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Lucas De Marchi <[email protected]>
(cherry picked from commit 35db1da)
Signed-off-by: Thomas Hellström <[email protected]>

Author: matt-auld

drivers/gpu/drm/xe/display/xe_fb_pin.c

@@ -164,6 +164,9 @@ static int __xe_pin_fb_vma_dpt(const struct intel_framebuffer *fb,
 
 	vma->dpt = dpt;
 	vma->node = dpt->ggtt_node[tile0->id];
+
+	/* Ensure DPT writes are flushed */
+	xe_device_l2_flush(xe);
 	return 0;
 }
 
@@ -333,8 +336,6 @@ static struct i915_vma *__xe_pin_fb_vma(const struct intel_framebuffer *fb,
 	if (ret)
 		goto err_unpin;
 
-	/* Ensure DPT writes are flushed */
-	xe_device_l2_flush(xe);
 	return vma;
 
 err_unpin: