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perf c2c: Update documentation for adding memory event table
Users may occasionally need to see which options are applied to memory events. This helps to understand the behavior of "perf c2c" and "perf mem", and provides guidance for configuring memory event options directly. Add a table to track memory events and their corresponding options, and include the Arm SPE events in it. Suggested-by: Al Grant <[email protected]> Reviewed-by: James Clark <[email protected]> Signed-off-by: Leo Yan <[email protected]> Cc: Adrian Hunter <[email protected]> Cc: Ian Rogers <[email protected]> Cc: Jiri Olsa <[email protected]> Cc: Mark Rutland <[email protected]> Cc: Mike Leach <[email protected]> Cc: Namhyung Kim <[email protected]> Cc: Will Deacon <[email protected]> Signed-off-by: Arnaldo Carvalho de Melo <[email protected]>
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tools/perf/Documentation/perf-c2c.txt

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@@ -160,20 +160,43 @@ Following perf record options are configured by default:
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-W,-d,--phys-data,--sample-cpu
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Unless specified otherwise with '-e' option, following events are monitored by
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default on Intel:
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cpu/mem-loads,ldlat=30/P
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cpu/mem-stores/P
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following on AMD:
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ibs_op//
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and following on PowerPC:
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cpu/mem-loads/
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cpu/mem-stores/
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The following table lists the events monitored on different architectures.
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Unless specified otherwise with the -e option, the tool will select the
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default events.
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+--------+---------------+-----------------+--------------------------------------------------------------------------------+
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| Arch | Configuration | Options | Events |
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+--------+---------------+-----------------+--------------------------------------------------------------------------------+
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| Intel | Default | -e ldlat-loads | cpu/mem-loads,ldlat=30/P |
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| | | -e ldlat-stores | cpu/mem-stores/P |
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| |---------------+-----------------+--------------------------------------------------------------------------------+
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| | Load only | -e ldlat-loads | cpu/mem-loads,ldlat=30/P |
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| |---------------+-----------------+--------------------------------------------------------------------------------+
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| | Store only | -e ldlat-stores | cpu/mem-stores/P |
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+--------+---------------+-----------------+--------------------------------------------------------------------------------+
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| Intel | Default | -e ldlat-loads | {cpu/mem-loads-aux/,cpu/mem-loads,ldlat=30/}:P |
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| with | | -e ldlat-stores | cpu/mem-stores/P |
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| AUX |--------------+------------------+--------------------------------------------------------------------------------+
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| | Load only | -e ldlat-loads | {cpu/mem-loads-aux/,cpu/mem-loads,ldlat=30/}:P |
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| |---------------+-----------------+--------------------------------------------------------------------------------+
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| | Store only | -e ldlat-stores | cpu/mem-stores/P |
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+--------+---------------+-----------------+--------------------------------------------------------------------------------+
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| AMD | Default | -e mem-ldst | ibs_op// (without latency support) |
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| | | | ibs_op/ldlat=30/ (with latency support) |
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+--------+---------------+-----------------+--------------------------------------------------------------------------------+
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| PowerPC| Default | -e ldlat-loads | cpu/mem-loads/ |
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| | | -e ldlat-stores | cpu/mem-stores/ |
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| |---------------+-----------------+--------------------------------------------------------------------------------+
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| | Load only | -e ldlat-loads | cpu/mem-loads/ |
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| |---------------+-----------------+--------------------------------------------------------------------------------+
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| | Store only | -e ldlat-stores | cpu/mem-stores/ |
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+--------+---------------+-----------------+--------------------------------------------------------------------------------+
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| Arm | Default | -e spe-ldst | arm_spe_0/ts_enable=1,pa_enable=1,load_filter=1,store_filter=1,min_latency=30/ |
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| SPE |---------------+-----------------+--------------------------------------------------------------------------------+
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| | Load only | -e spe-load | arm_spe_0/ts_enable=1,pa_enable=1,load_filter=1,min_latency=30/ |
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| |---------------+-----------------+--------------------------------------------------------------------------------+
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| | Store only | -e spe-store | arm_spe_0/ts_enable=1,pa_enable=1,store_filter=1/ |
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+--------+---------------+-----------------+--------------------------------------------------------------------------------+
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User can pass any 'perf record' option behind '--' mark, like (to enable
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callchains and system wide monitoring):

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