Commit 265d6ab
riscv: uaccess: Only restore the CSR_STATUS SUM bit
During switch to csrs will OR the value of the register into the
corresponding csr. In this case we're only interested in restoring the
SUM bit not the entire register.
Signed-off-by: Cyril Bur <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Co-developed-by: Alexandre Ghiti <[email protected]>
Signed-off-by: Alexandre Ghiti <[email protected]>
Fixes: 788aa64 ("riscv: save the SR_SUM status over switches")
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Palmer Dabbelt <[email protected]>1 parent 2670a39 commit 265d6ab
3 files changed
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