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Add driver for clock controller in Tenstorrent Atlantis SoC. This version
of the driver covers clocks from RCPU subsystem.
5 types of clocks generated by this controller: PLLs (PLLs
with bypass functionality and an additional Gate clk at output), Shared
Gates (Multiple Gate clks that share an enable bit), standard Muxes,
Dividers and Gates. All clocks are implemented using custom clk ops and
use the regmap interface associated with the syscon. All clocks are derived
from a 24 Mhz oscillator.
The reset controller is also setup as an auxiliary device of the clock
controller.
Signed-off-by: Anirudh Srinivasan <[email protected]>
Reviewed-by: Brian Masney <[email protected]>
Reviewed-by: Drew Fustini <[email protected]>
Signed-off-by: Drew Fustini <[email protected]>
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