Minor L4T/Switch changes before 4.x release. (#1631)

* Add support for 32.7.1 bsp

* Add option to uenv.txt to use performance governor.

* Add support for auto frequency changing based upon docking

* Add README.md to L4T Project since it is its own beast

* Fix flycast issues in L4T builds, by reverting back to upstream libretro master, which actually has support for nano platform

Author: GavinDarkglider

projects/L4T/README.md

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+# L4T Developer Guide
+
+## What Works
+
+1. Tegra BSP Libs on tegra210 devices(Untested elsewhere)
+2. ffmpeg encoding/decoding using nvv4l2 encoder/decoder on tegra chips.
+
+## What Still needs to be done:
+1. Kernel get script needs proper cleanup and zip downloading/merge patching support for non switch version finished/tested.
+2. There is no bootloader support for standard tegra devices. I dont have any, so this is an undertaking I am unwilling to do at this time.
+3. Tegra-BSP might need some work on non t210 boards, I havnt bothered testing building for them. Probably the biggest differences will be the config file, or file name issues, the logic should be about the same.
+
+
+## Basic L4T Device Options:
+
+```
+GENERIC_L4T_VERSION= # Available Options: [ 32.3.1 32.4.2 32.4.3 32.4.4 32.5 32.5.1 32.6 32.6.1 32.7.1 ] 
+L4T_DEVICE_TYPE="" # Available Options: [ t210 t18x t19x ]
+```
+Sha256 of generated file.
+
+This doesnt work properly, but when I refactor l4t_kernel_get stuff I plan on fixing it
+```
+L4T_COMBINED_KERNEL_SHA256=""
+```
+## Optional L4T Options:
+### Only set if you need to, these point at nvidia tegra git by default.
+
+### Only Use REPO or URL, never both at the same time
+
+### Currently URL Downloading is broken/not implemented. Still needs work.
+
+### This is default if not using custom kernel branches. I never bothered rebasing patches on generic kernels. [ 0 or 1]
+```
+FORCE_GENERIC_L4T_PATCHES=
+```
+### This is only used in conjunction with L4T_DEVICE_CUSTOM_* and is needed to place custom board dts properly in kernel tree.
+```
+L4T_DEVICE_CUSTOM_BOARD_NAME=""
+```
+### These should be self explanitory if not check projects/L4T/devices/Switch/options
+```
+L4T_KERNEL_4_9_REPO=""
+L4T_KERNEL_4_9_REPO_BRANCH=""
+L4T_KERNEL_4_9_REPO_SHA256=""
+L4T_KERNEL_4_9_URL=""
+
+L4T_KERNEL_NVIDIA_REPO=""
+L4T_KERNEL_NVIDIA_REPO_BRANCH=""
+L4T_KERNEL_NVIDIA_REPO_SHA256=""
+L4T_KERNEL_NVIDIA_URL=""
+
+L4T_KERNEL_NVGPU_REPO=""
+L4T_KERNEL_NVGPU_REPO_BRANCH=""
+L4T_KERNEL_NVGPU_REPO_SHA256=""
+L4T_KERNEL_NVGPU_URL=""
+
+L4T_DEVICE_TEGRA_REPO=""
+L4T_DEVICE_TEGRA_REPO_BRANCH=""
+L4T_DEVICE_TEGRA_REPO_SHA256=""
+L4T_DEVICE_TEGRA_URL=""
+
+L4T_DEVICE_COMMON_TEGRA_REPO=""
+L4T_DEVICE_COMMON_TEGRA_REPO_BRANCH=""
+L4T_DEVICE_COMMON_TEGRA_REPO_SHA256=""
+L4T_DEVICE_COMMON_TEGRA_URL=""
+```
+### These depend on L4T_DEVICE_TYPE, and wont be used if not building for t210
+```
+L4T_DEVICE_COMMON_T210_REPO=""
+L4T_DEVICE_COMMON_T210_REPO_BRANCH=""
+L4T_DEVICE_COMMON_T210_REPO_SHA256=""
+L4T_DEVICE_COMMON_T210_URL=""
+
+L4T_DEVICE_T210_REPO=""
+L4T_DEVICE_T210_REPO_BRANCH=""
+L4T_DEVICE_T210_REPO_SHA256=""
+L4T_DEVICE_T210_URL=""
+
+L4T_DEVICE_T210_JETSON_REPO=""
+L4T_DEVICE_T210_JETSON_REPO_BRANCH=""
+L4T_DEVICE_T210_JETSON_REPO_SHA256=""
+L4T_DEVICE_T210_JETSON_URL=""
+
+L4T_DEVICE_T210_BATUU_REPO=""
+L4T_DEVICE_T210_BATUU_REPO_BRANCH=""
+L4T_DEVICE_T210_BATUU_REPO_SHA256=""
+L4T_DEVICE_T210_BATUU_URL=""
+
+L4T_DEVICE_T210_PORG_REPO=""
+L4T_DEVICE_T210_PORG_REPO_BRANCH=""
+L4T_DEVICE_T210_PORG_REPO_SHA256=""
+L4T_DEVICE_T210_PORG_URL=""
+```
+### These depend on L4T_DEVICE_TYPE, and wont be used if not building for t18x
+```
+L4T_DEVICE_COMMON_T18X_REPO=""
+L4T_DEVICE_COMMON_T18X_REPO_BRANCH=""
+L4T_DEVICE_COMMON_T18X_REPO_SHA256=""
+L4T_DEVICE_COMMON_T18X_URL=""
+
+L4T_DEVICE_T18X_REPO=""
+L4T_DEVICE_T18X_REPO_BRANCH=""
+L4T_DEVICE_T18X_REPO_SHA256=""
+L4T_DEVICE_T18X_URL=""
+
+L4T_DEVICE_T18X_QUILL_REPO=""
+L4T_DEVICE_T18X_QUILL_REPO_BRANCH=""
+L4T_DEVICE_T18X_QUILL_REPO_SHA256=""
+L4T_DEVICE_T18X_QUILL_URL=""
+```
+### These depend on L4T_DEVICE_TYPE, and wont be used if not building for t19x
+```
+L4T_DEVICE_COMMON_T19X_REPO=""
+L4T_DEVICE_COMMON_T19X_REPO_BRANCH=""
+L4T_DEVICE_COMMON_T19X_REPO_SHA256=""
+L4T_DEVICE_COMMON_T19X_URL=""
+
+L4T_DEVICE_T19X_REPO=""
+L4T_DEVICE_T19X_REPO_BRANCH=""
+L4T_DEVICE_T19X_REPO_SHA256=""
+L4T_DEVICE_T19X_URL=""
+
+L4T_DEVICE_T19X_GALEN_REPO=""
+L4T_DEVICE_T19X_GALEN_REPO_BRANCH=""
+L4T_DEVICE_T19X_GALEN_REPO_SHA256=""
+L4T_DEVICE_T19X_GALEN_URL=""
+
+L4T_DEVICE_T19X_JAKKU_REPO=""
+L4T_DEVICE_T19X_JAKKU_REPO_BRANCH=""
+L4T_DEVICE_T19X_JAKKU_REPO_SHA256=""
+L4T_DEVICE_T19X_JAKKU_URL=""
+```
+
+### Apply Custom Device DTS tree.
+```
+L4T_DEVICE_CUSTOM_REPO=""
+L4T_DEVICE_CUSTOM_REPO_BRANCH=""
+L4T_DEVICE_CUSTOM_REPO_SHA256=""
+L4T_DEVICE_CUSTOM_REPO_URL=""
+```

projects/L4T/devices/Switch/custom-tegra-firmware/bcm4354.hcd

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+# Sample variables file for BCM94354 WLBGA iPA, iLNA board with SDIO for production package
+#NOTE: UPDATED TSSI PARAMETER FOR JETSON WITH COEX FILTER ON 10/5/2015. SHAILESH SINGH
+NVRAMRev=$Rev: 373428 $
+sromrev=11
+boardrev=0x1101
+boardtype=0x06db
+boardflags=0x02400201
+#enable LNA1 bypass for both 2G & 5G
+
+#boardflags2=0xc0800000
+boardflags2=0x00802000
+
+boardflags3=0x4000000a
+#boardnum=57410
+macaddr=00:90:4c:16:70:01
+ccode=XR
+regrev=122
+antswitch=0
+pdgain5g=4
+pdgain2g=4
+tworangetssi2g=0
+tworangetssi5g=0
+paprdis=1
+femctrl=10
+vendid=0x14e4
+devid=0x43a3
+manfid=0x2d0
+#prodid=0x052e
+nocrc=1
+otpimagesize=502
+
+xtalfreq=37400
+rxgains2gelnagaina0=0
+
+#rxgains2gtrisoa0=3
+rxgains2gtrisoa0=7
+
+rxgains2gtrelnabypa0=0
+rxgains5gelnagaina0=0
+
+#rxgains5gtrisoa0=4
+rxgains5gtrisoa0=11
+
+rxgains5gtrelnabypa0=0
+rxgains5gmelnagaina0=0
+
+#rxgains5gmtrisoa0=4
+rxgains5gmtrisoa0=13
+
+rxgains5gmtrelnabypa0=0
+rxgains5ghelnagaina0=0
+
+#rxgains5ghtrisoa0=4
+rxgains5ghtrisoa0=12
+
+rxgains5ghtrelnabypa0=0
+rxgains2gelnagaina1=0
+
+#rxgains2gtrisoa1=3
+rxgains2gtrisoa1=7
+
+rxgains2gtrelnabypa1=0
+rxgains5gelnagaina1=0
+
+#rxgains5gtrisoa1=4
+rxgains5gtrisoa1=10
+
+rxgains5gtrelnabypa1=0
+rxgains5gmelnagaina1=0
+
+#rxgains5gmtrisoa1=4
+rxgains5gmtrisoa1=11
+
+rxgains5gmtrelnabypa1=0
+rxgains5ghelnagaina1=0
+
+#rxgains5ghtrisoa1=4
+rxgains5ghtrisoa1=11
+
+rxchain=3
+txchain=3
+aa2g=3
+aa5g=3
+agbg0=2
+agbg1=2
+aga0=2
+aga1=2
+tssipos2g=1
+extpagain2g=2
+tssipos5g=1
+extpagain5g=2
+tempthresh=255
+tempoffset=255
+rawtempsense=0x1ff
+#pa2ga0=-98,6012,-652
+#pa2ga1=-37,6488,-663
+#pa5ga0=-74,5929,-633,-74,5928,-631,-57,5987,-615,-37,6048,-613
+#pa5ga1=18,6630,-645,-8,6498,-665,47,6774,-637,26,6741,-651
+#pa2ga0=-169,6154,-729
+#pa2ga1=-149,6457,-741
+pa2ga0=-164,5202,-656
+pa2ga1=-180,5157,-654
+pa5ga0=-181,6179,-745,-180,6166,-740,-176,6025,-728,-175,5877,-718
+pa5ga1=-199,5842,-726,-198,5855,-728,-191,5691,-712,-170,5809,-715
+subband5gver=0x4
+pdoffsetcckma0=0x4
+pdoffsetcckma1=0x4
+pdoffset40ma0=0x0000
+pdoffset80ma0=0x0000
+pdoffset40ma1=0x0000
+pdoffset80ma1=0x0000
+maxp2ga0=74
+maxp5ga0=74,74,74,74
+maxp2ga1=74
+maxp5ga1=74,74,74,74
+cckbw202gpo=0x0000
+cckbw20ul2gpo=0x0000
+mcsbw202gpo=0x99644422
+mcsbw402gpo=0x99644422
+dot11agofdmhrbw202gpo=0x6666
+ofdmlrbw202gpo=0x0022
+mcsbw205glpo=0x88766663
+mcsbw405glpo=0x88666663
+mcsbw805glpo=0xbb666665
+mcsbw205gmpo=0xd8666663
+mcsbw405gmpo=0x88666663
+mcsbw805gmpo=0xcc666665
+mcsbw205ghpo=0xdc666663
+mcsbw405ghpo=0xaa666663
+mcsbw805ghpo=0xdd666665
+mcslr5glpo=0x0000
+mcslr5gmpo=0x0000
+mcslr5ghpo=0x0000
+sb20in40hrpo=0x0
+sb20in80and160hr5glpo=0x0
+sb40and80hr5glpo=0x0
+sb20in80and160hr5gmpo=0x0
+sb40and80hr5gmpo=0x0
+sb20in80and160hr5ghpo=0x0
+sb40and80hr5ghpo=0x0
+sb20in40lrpo=0x0
+sb20in80and160lr5glpo=0x0
+sb40and80lr5glpo=0x0
+sb20in80and160lr5gmpo=0x0
+sb40and80lr5gmpo=0x0
+sb20in80and160lr5ghpo=0x0
+sb40and80lr5ghpo=0x0
+dot11agduphrpo=0x0
+dot11agduplrpo=0x0
+phycal_tempdelta=255
+temps_period=15
+temps_hysteresis=15
+AvVmid_c0=2,140,2,145,2,145,2,145,2,145
+AvVmid_c1=2,140,2,145,2,145,2,145,2,145
+AvVmid_c2=0,0,0,0,0,0,0,0,0,0
+rssicorrnorm_c0=4,4
+rssicorrnorm_c1=4,4
+rssicorrnorm5g_c0=1,2,3,1,2,3,6,6,8,6,6,8
+rssicorrnorm5g_c1=1,2,3,2,2,2,7,7,8,7,7,8
+
+muxenab=0x11
+ltecxmux=0x534201

projects/L4T/devices/Switch/custom-tegra-firmware/brcm/fw_bcmdhd.bin

@@ -0,0 +1 @@
+tegra21x

projects/L4T/devices/Switch/custom-tegra-firmware/brcm/nvram.txt

@@ -0,0 +1 @@
+04040525