Merge pull request #2211 from SAP/pr-jdk-27+15

Merge to tag jdk-27+15

Author: RealCLanger

make/autoconf/jdk-options.m4

@@ -102,6 +102,13 @@ AC_DEFUN_ONCE([JDKOPT_SETUP_JDK_OPTIONS],
       CHECKING_MSG: [if we should build headless-only (no GUI)])
   AC_SUBST(ENABLE_HEADLESS_ONLY)
 
+  # Avoid headless-only on macOS and Windows, it is not supported there
+  if test "x$ENABLE_HEADLESS_ONLY" = xtrue; then
+    if test "x$OPENJDK_TARGET_OS" = xwindows || test "x$OPENJDK_TARGET_OS" = xmacosx; then
+      AC_MSG_ERROR([headless-only is not supported on macOS and Windows])
+    fi
+  fi
+
   # should we linktime gc unused code sections in the JDK build ?
   if test "x$OPENJDK_TARGET_OS" = "xlinux"; then
     if test "x$OPENJDK_TARGET_CPU" = "xs390x" || test "x$OPENJDK_TARGET_CPU" = "xppc64le"; then

make/modules/java.desktop/lib/ClientLibraries.gmk

@@ -338,11 +338,8 @@ else
   # noexcept-type required for GCC 7 builds. Not required for GCC 8+.
   # expansion-to-defined required for GCC 9 builds. Not required for GCC 10+.
   # maybe-uninitialized required for GCC 8 builds. Not required for GCC 9+.
-  # calloc-transposed-args required for GCC 14 builds. (fixed upstream in
-  #  Harfbuzz 032c931e1c0cfb20f18e5acb8ba005775242bd92)
   HARFBUZZ_DISABLED_WARNINGS_CXX_gcc := class-memaccess noexcept-type \
-      expansion-to-defined dangling-reference maybe-uninitialized \
-      calloc-transposed-args
+      expansion-to-defined dangling-reference maybe-uninitialized
   HARFBUZZ_DISABLED_WARNINGS_clang := missing-field-initializers \
       range-loop-analysis unused-variable
   HARFBUZZ_DISABLED_WARNINGS_microsoft := 4267 4244

make/modules/jdk.jpackage/Java.gmk

@@ -1,5 +1,5 @@
 #
-# Copyright (c) 2020, 2025, Oracle and/or its affiliates. All rights reserved.
+# Copyright (c) 2020, 2026, Oracle and/or its affiliates. All rights reserved.
 # DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
 #
 # This code is free software; you can redistribute it and/or modify it
@@ -29,7 +29,7 @@ DISABLED_WARNINGS_java += dangling-doc-comments
 
 COPY += .gif .png .txt .spec .script .prerm .preinst \
     .postrm .postinst .list .sh .desktop .copyright .control .plist .template \
-    .icns .scpt .wxs .wxl .wxi .wxf .ico .bmp .tiff .service .xsl
+    .icns .scpt .wxs .wxl .wxi .wxf .ico .bmp .tiff .service .xsl .js
 
 CLEAN += .properties
 

make/test/JtregNativeJdk.gmk

@@ -1,5 +1,5 @@
 #
-# Copyright (c) 2015, 2025, Oracle and/or its affiliates. All rights reserved.
+# Copyright (c) 2015, 2026, Oracle and/or its affiliates. All rights reserved.
 # DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
 #
 # This code is free software; you can redistribute it and/or modify it
@@ -63,7 +63,8 @@ ifeq ($(call isTargetOs, windows), true)
   BUILD_JDK_JTREG_EXCLUDE += libDirectIO.c libInheritedChannel.c \
       libExplicitAttach.c libImplicitAttach.c \
       exelauncher.c libFDLeaker.c exeFDLeakTester.c \
-      libChangeSignalDisposition.c exePrintSignalDisposition.c
+      libChangeSignalDisposition.c exePrintSignalDisposition.c \
+      libConcNativeFork.c libPipesCloseOnExec.c
 
   #SapMachine 2024-06-12: Exclude libCreateNewProcessGroupOnSpawnTest.c from native compilation on Windows
   BUILD_JDK_JTREG_EXCLUDE += libCreateNewProcessGroupOnSpawnTest.c
@@ -80,6 +81,9 @@ else
   BUILD_JDK_JTREG_LIBRARIES_LDFLAGS_libLinkerInvokerUnnamed := -pthread
   BUILD_JDK_JTREG_LIBRARIES_LDFLAGS_libLinkerInvokerModule := -pthread
   BUILD_JDK_JTREG_LIBRARIES_LDFLAGS_libLoaderLookupInvoker := -pthread
+  BUILD_JDK_JTREG_LIBRARIES_LDFLAGS_libConcNativeFork := -pthread
+  BUILD_JDK_JTREG_LIBRARIES_LDFLAGS_libPipesCloseOnExec := -pthread
+  BUILD_JDK_JTREG_LIBRARIES_LDFLAGS_libLoaderLookupInvoker := -pthread
 
   BUILD_JDK_JTREG_LIBRARIES_LDFLAGS_libExplicitAttach := -pthread
   BUILD_JDK_JTREG_LIBRARIES_LDFLAGS_libImplicitAttach := -pthread

src/hotspot/cpu/aarch64/aarch64.ad

@@ -2524,10 +2524,6 @@ uint Matcher::float_pressure_limit()
   return (FLOATPRESSURE == -1) ? _FLOAT_REG_mask.size() : FLOATPRESSURE;
 }
 
-bool Matcher::use_asm_for_ldiv_by_con(jlong divisor) {
-  return false;
-}
-
 const RegMask& Matcher::divI_proj_mask() {
   ShouldNotReachHere();
   return RegMask::EMPTY;

src/hotspot/cpu/arm/arm.ad

@@ -1,5 +1,5 @@
 //
-// Copyright (c) 2008, 2025, Oracle and/or its affiliates. All rights reserved.
+// Copyright (c) 2008, 2026, Oracle and/or its affiliates. All rights reserved.
 // DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
 //
 // This code is free software; you can redistribute it and/or modify it
@@ -1112,10 +1112,6 @@ uint Matcher::float_pressure_limit()
   return (FLOATPRESSURE == -1) ? 30 : FLOATPRESSURE;
 }
 
-bool Matcher::use_asm_for_ldiv_by_con( jlong divisor ) {
-  return false;
-}
-
 // Register for DIVI projection of divmodI
 const RegMask& Matcher::divI_proj_mask() {
   ShouldNotReachHere();

src/hotspot/cpu/ppc/assembler_ppc.hpp

@@ -1580,10 +1580,6 @@ class Assembler : public AbstractAssembler {
   static bool is_nop(int x) {
     return x == 0x60000000;
   }
-  // endgroup opcode for Power6
-  static bool is_endgroup(int x) {
-    return is_ori(x) && inv_ra_field(x) == 1 && inv_rs_field(x) == 1 && inv_d1_field(x) == 0;
-  }
 
 
  private:
@@ -1659,9 +1655,6 @@ class Assembler : public AbstractAssembler {
   inline void ori_opt( Register d, int ui16);
   inline void oris_opt(Register d, int ui16);
 
-  // endgroup opcode for Power6
-  inline void endgroup();
-
   // count instructions
   inline void cntlzw(  Register a, Register s);
   inline void cntlzw_( Register a, Register s);

src/hotspot/cpu/ppc/assembler_ppc.inline.hpp

@@ -253,8 +253,6 @@ inline void Assembler::mr(      Register d, Register s)   { Assembler::orr(d, s,
 inline void Assembler::ori_opt( Register d, int ui16)     { if (ui16!=0) Assembler::ori( d, d, ui16); }
 inline void Assembler::oris_opt(Register d, int ui16)     { if (ui16!=0) Assembler::oris(d, d, ui16); }
 
-inline void Assembler::endgroup()                         { Assembler::ori(R1, R1, 0); }
-
 // count instructions
 inline void Assembler::cntlzw(  Register a, Register s)              { emit_int32(CNTLZW_OPCODE | rta(a) | rs(s) | rc(0)); }
 inline void Assembler::cntlzw_( Register a, Register s)              { emit_int32(CNTLZW_OPCODE | rta(a) | rs(s) | rc(1)); }

src/hotspot/cpu/ppc/disassembler_ppc.cpp

@@ -119,9 +119,6 @@ address Disassembler::decode_instruction0(address here, outputStream * st, addre
   } else if (instruction == 0xbadbabe) {
     st->print(".data 0xbadbabe");
     next = here + Assembler::instr_len(here);
-  } else if (Assembler::is_endgroup(instruction)) {
-    st->print("endgroup");
-    next = here + Assembler::instr_len(here);
   } else {
     next = here;
   }

src/hotspot/cpu/ppc/macroAssembler_ppc.cpp

@@ -483,7 +483,7 @@ void MacroAssembler::set_dest_of_bc_far_at(address instruction_addr, address des
     // variant 3, far cond branch to the next instruction, already patched to nops:
     //
     //    nop
-    //    endgroup
+    //    nop
     //  SKIP/DEST:
     //
     return;
@@ -500,7 +500,7 @@ void MacroAssembler::set_dest_of_bc_far_at(address instruction_addr, address des
   if (is_bc_far_variant2_at(instruction_addr) && dest == instruction_addr + 8) {
     // Far branch to next instruction: Optimize it by patching nops (produce variant 3).
     masm.nop();
-    masm.endgroup();
+    masm.nop();
   } else {
     if (is_bc_far_variant1_at(instruction_addr)) {
       // variant 1, the 1st instruction contains the destination address: