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Merge tag 'jdk-17.0.19+10' into sapmachine17
Added tag jdk-17.0.19+10 for changeset 982d53c
2 parents 9c323f4 + 982d53c commit ba0476c

41 files changed

Lines changed: 529 additions & 294 deletions

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‎make/conf/version-numbers.conf‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -39,4 +39,4 @@ DEFAULT_VERSION_CLASSFILE_MINOR=0
3939
DEFAULT_VERSION_DOCS_API_SINCE=11
4040
DEFAULT_ACCEPTABLE_BOOT_VERSIONS="16 17"
4141
DEFAULT_JDK_SOURCE_TARGET_VERSION=17
42-
DEFAULT_PROMOTED_VERSION_PRE=ea
42+
DEFAULT_PROMOTED_VERSION_PRE=

‎src/hotspot/cpu/aarch64/aarch64.ad‎

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -8395,10 +8395,11 @@ instruct bytes_reverse_unsigned_short(iRegINoSp dst, iRegIorL2I src) %{
83958395
match(Set dst (ReverseBytesUS src));
83968396

83978397
ins_cost(INSN_COST);
8398-
format %{ "rev16w $dst, $src" %}
8398+
format %{ "rev16w $dst, $src\t# $dst -> unsigned short" %}
83998399

84008400
ins_encode %{
84018401
__ rev16w(as_Register($dst$$reg), as_Register($src$$reg));
8402+
__ narrow_subword_type(as_Register($dst$$reg), T_CHAR);
84028403
%}
84038404

84048405
ins_pipe(ialu_reg);

‎src/hotspot/cpu/aarch64/macroAssembler_aarch64.cpp‎

Lines changed: 11 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2058,6 +2058,17 @@ void MacroAssembler::store_sized_value(Address dst, Register src, size_t size_in
20582058
}
20592059
}
20602060

2061+
void MacroAssembler::narrow_subword_type(Register reg, BasicType bt) {
2062+
assert(is_subword_type(bt), "required");
2063+
switch (bt) {
2064+
case T_BOOLEAN: andw(reg, reg, 1); break;
2065+
case T_BYTE: sxtbw(reg, reg); break;
2066+
case T_CHAR: uxthw(reg, reg); break;
2067+
case T_SHORT: sxthw(reg, reg); break;
2068+
default: ShouldNotReachHere();
2069+
}
2070+
}
2071+
20612072
void MacroAssembler::decrementw(Register reg, int value)
20622073
{
20632074
if (value < 0) { incrementw(reg, -value); return; }

‎src/hotspot/cpu/aarch64/macroAssembler_aarch64.hpp‎

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -29,6 +29,7 @@
2929
#include "asm/assembler.inline.hpp"
3030
#include "oops/compressedOops.hpp"
3131
#include "runtime/vm_version.hpp"
32+
#include "utilities/globalDefinitions.hpp"
3233
#include "utilities/powerOfTwo.hpp"
3334

3435
// MacroAssembler extends Assembler by frequently used macros.
@@ -657,6 +658,9 @@ class MacroAssembler: public Assembler {
657658
// Support for sign-extension (hi:lo = extend_sign(lo))
658659
void extend_sign(Register hi, Register lo);
659660

661+
// Clean up a subword typed value to the representation in compliance with JVMS §2.3
662+
void narrow_subword_type(Register reg, BasicType bt);
663+
660664
// Load and store values by size and signed-ness
661665
void load_sized_value(Register dst, Address src, size_t size_in_bytes, bool is_signed, Register dst2 = noreg);
662666
void store_sized_value(Address dst, Register src, size_t size_in_bytes, Register src2 = noreg);

‎src/hotspot/cpu/arm/arm.ad‎

Lines changed: 5 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -9203,10 +9203,12 @@ instruct bytes_reverse_long(iRegL dst, iRegL src) %{
92039203

92049204
instruct bytes_reverse_unsigned_short(iRegI dst, iRegI src) %{
92059205
match(Set dst (ReverseBytesUS src));
9206-
size(4);
9207-
format %{ "REV16 $dst,$src" %}
9206+
size(8);
9207+
format %{ "REV32 $dst,$src\n\t"
9208+
"LSR $dst,$dst,#16" %}
92089209
ins_encode %{
9209-
__ rev16($dst$$Register, $src$$Register);
9210+
__ rev($dst$$Register, $src$$Register);
9211+
__ mov($dst$$Register, AsmOperand($dst$$Register, lsr, 16));
92109212
%}
92119213
ins_pipe( iload_mem ); // FIXME
92129214
%}

‎src/hotspot/cpu/ppc/ppc.ad‎

Lines changed: 17 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -13041,6 +13041,19 @@ instruct countTrailingZerosL_cnttzd(iRegIdst dst, iRegLsrc src) %{
1304113041
ins_pipe(pipe_class_default);
1304213042
%}
1304313043

13044+
// Expand nodes for byte_reverse_int/ushort/short.
13045+
instruct rlwinm(iRegIdst dst, iRegIsrc src, immI16 shift, immI16 mb, immI16 me) %{
13046+
effect(DEF dst, USE src, USE shift, USE mb, USE me);
13047+
predicate(false);
13048+
13049+
format %{ "RLWINM $dst, $src, $shift, $mb, $me" %}
13050+
size(4);
13051+
ins_encode %{
13052+
__ rlwinm($dst$$Register, $src$$Register, $shift$$constant, $mb$$constant, $me$$constant);
13053+
%}
13054+
ins_pipe(pipe_class_default);
13055+
%}
13056+
1304413057
// Expand nodes for byte_reverse_int.
1304513058
instruct insrwi_a(iRegIdst dst, iRegIsrc src, immI16 n, immI16 b) %{
1304613059
effect(DEF dst, USE src, USE n, USE b);
@@ -13197,34 +13210,22 @@ instruct bytes_reverse_long(iRegLdst dst, iRegLsrc src) %{
1319713210
ins_pipe(pipe_class_default);
1319813211
%}
1319913212

13213+
// Need zero extend. Must not use brh only.
1320013214
instruct bytes_reverse_ushort_Ex(iRegIdst dst, iRegIsrc src) %{
1320113215
match(Set dst (ReverseBytesUS src));
13202-
predicate(!UseByteReverseInstructions);
1320313216
ins_cost(2*DEFAULT_COST);
1320413217

1320513218
expand %{
13219+
immI16 imm31 %{ (int) 31 %}
13220+
immI16 imm24 %{ (int) 24 %}
1320613221
immI16 imm16 %{ (int) 16 %}
1320713222
immI16 imm8 %{ (int) 8 %}
1320813223

13209-
urShiftI_reg_imm(dst, src, imm8);
13224+
rlwinm(dst, src, imm24, imm24, imm31);
1321013225
insrwi(dst, src, imm8, imm16);
1321113226
%}
1321213227
%}
1321313228

13214-
instruct bytes_reverse_ushort(iRegIdst dst, iRegIsrc src) %{
13215-
match(Set dst (ReverseBytesUS src));
13216-
predicate(UseByteReverseInstructions);
13217-
ins_cost(DEFAULT_COST);
13218-
size(4);
13219-
13220-
format %{ "BRH $dst, $src" %}
13221-
13222-
ins_encode %{
13223-
__ brh($dst$$Register, $src$$Register);
13224-
%}
13225-
ins_pipe(pipe_class_default);
13226-
%}
13227-
1322813229
instruct bytes_reverse_short_Ex(iRegIdst dst, iRegIsrc src) %{
1322913230
match(Set dst (ReverseBytesS src));
1323013231
predicate(!UseByteReverseInstructions);

‎src/hotspot/cpu/x86/macroAssembler_x86.cpp‎

Lines changed: 12 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -51,6 +51,7 @@
5151
#include "runtime/sharedRuntime.hpp"
5252
#include "runtime/stubRoutines.hpp"
5353
#include "runtime/thread.hpp"
54+
#include "utilities/globalDefinitions.hpp"
5455
#include "utilities/macros.hpp"
5556
#include "crc32c.h"
5657

@@ -3107,6 +3108,17 @@ void MacroAssembler::sign_extend_short(Register reg) {
31073108
}
31083109
}
31093110

3111+
void MacroAssembler::narrow_subword_type(Register reg, BasicType bt) {
3112+
assert(is_subword_type(bt), "required");
3113+
switch (bt) {
3114+
case T_BOOLEAN: andl(reg, 1); break;
3115+
case T_BYTE: movsbl(reg, reg); break;
3116+
case T_CHAR: movzwl(reg, reg); break;
3117+
case T_SHORT: movswl(reg, reg); break;
3118+
default: ShouldNotReachHere();
3119+
}
3120+
}
3121+
31103122
void MacroAssembler::testl(Register dst, AddressLiteral src) {
31113123
assert(reachable(src), "Address should be reachable");
31123124
testl(dst, as_Address(src));

‎src/hotspot/cpu/x86/macroAssembler_x86.hpp‎

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -433,6 +433,9 @@ class MacroAssembler: public Assembler {
433433
void sign_extend_short(Register reg);
434434
void sign_extend_byte(Register reg);
435435

436+
// Clean up a subword typed value to the representation in compliance with JVMS §2.3
437+
void narrow_subword_type(Register reg, BasicType bt);
438+
436439
// Division by power of 2, rounding towards 0
437440
void division_with_shift(Register reg, int shift_value);
438441

‎src/hotspot/cpu/x86/x86_32.ad‎

Lines changed: 8 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -7409,10 +7409,11 @@ instruct xaddB_no_res( memory mem, Universe dummy, immI add, eFlagsReg cr) %{
74097409
instruct xaddB( memory mem, xRegI newval, eFlagsReg cr) %{
74107410
match(Set newval (GetAndAddB mem newval));
74117411
effect(KILL cr);
7412-
format %{ "XADDB [$mem],$newval" %}
7412+
format %{ "XADDB [$mem],$newval\t# $newval -> byte" %}
74137413
ins_encode %{
74147414
__ lock();
74157415
__ xaddb($mem$$Address, $newval$$Register);
7416+
__ narrow_subword_type($newval$$Register, T_BYTE);
74167417
%}
74177418
ins_pipe( pipe_cmpxchg );
74187419
%}
@@ -7432,10 +7433,11 @@ instruct xaddS_no_res( memory mem, Universe dummy, immI add, eFlagsReg cr) %{
74327433
instruct xaddS( memory mem, rRegI newval, eFlagsReg cr) %{
74337434
match(Set newval (GetAndAddS mem newval));
74347435
effect(KILL cr);
7435-
format %{ "XADDS [$mem],$newval" %}
7436+
format %{ "XADDS [$mem],$newval\t# $newval -> short" %}
74367437
ins_encode %{
74377438
__ lock();
74387439
__ xaddw($mem$$Address, $newval$$Register);
7440+
__ narrow_subword_type($newval$$Register, T_SHORT);
74397441
%}
74407442
ins_pipe( pipe_cmpxchg );
74417443
%}
@@ -7466,18 +7468,20 @@ instruct xaddI( memory mem, rRegI newval, eFlagsReg cr) %{
74667468
// Important to match to xRegI: only 8-bit regs.
74677469
instruct xchgB( memory mem, xRegI newval) %{
74687470
match(Set newval (GetAndSetB mem newval));
7469-
format %{ "XCHGB $newval,[$mem]" %}
7471+
format %{ "XCHGB $newval,[$mem]\t# $newval -> byte" %}
74707472
ins_encode %{
74717473
__ xchgb($newval$$Register, $mem$$Address);
7474+
__ narrow_subword_type($newval$$Register, T_BYTE);
74727475
%}
74737476
ins_pipe( pipe_cmpxchg );
74747477
%}
74757478

74767479
instruct xchgS( memory mem, rRegI newval) %{
74777480
match(Set newval (GetAndSetS mem newval));
7478-
format %{ "XCHGW $newval,[$mem]" %}
7481+
format %{ "XCHGW $newval,[$mem]\t# $newval -> short" %}
74797482
ins_encode %{
74807483
__ xchgw($newval$$Register, $mem$$Address);
7484+
__ narrow_subword_type($newval$$Register, T_SHORT);
74817485
%}
74827486
ins_pipe( pipe_cmpxchg );
74837487
%}

‎src/hotspot/cpu/x86/x86_64.ad‎

Lines changed: 8 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -7983,10 +7983,11 @@ instruct xaddB_no_res( memory mem, Universe dummy, immI add, rFlagsReg cr) %{
79837983
instruct xaddB( memory mem, rRegI newval, rFlagsReg cr) %{
79847984
match(Set newval (GetAndAddB mem newval));
79857985
effect(KILL cr);
7986-
format %{ "XADDB [$mem],$newval" %}
7986+
format %{ "XADDB [$mem],$newval\t# $newval -> byte" %}
79877987
ins_encode %{
79887988
__ lock();
79897989
__ xaddb($mem$$Address, $newval$$Register);
7990+
__ narrow_subword_type($newval$$Register, T_BYTE);
79907991
%}
79917992
ins_pipe( pipe_cmpxchg );
79927993
%}
@@ -8006,10 +8007,11 @@ instruct xaddS_no_res( memory mem, Universe dummy, immI add, rFlagsReg cr) %{
80068007
instruct xaddS( memory mem, rRegI newval, rFlagsReg cr) %{
80078008
match(Set newval (GetAndAddS mem newval));
80088009
effect(KILL cr);
8009-
format %{ "XADDW [$mem],$newval" %}
8010+
format %{ "XADDW [$mem],$newval\t# $newval -> short" %}
80108011
ins_encode %{
80118012
__ lock();
80128013
__ xaddw($mem$$Address, $newval$$Register);
8014+
__ narrow_subword_type($newval$$Register, T_SHORT);
80138015
%}
80148016
ins_pipe( pipe_cmpxchg );
80158017
%}
@@ -8062,18 +8064,20 @@ instruct xaddL( memory mem, rRegL newval, rFlagsReg cr) %{
80628064

80638065
instruct xchgB( memory mem, rRegI newval) %{
80648066
match(Set newval (GetAndSetB mem newval));
8065-
format %{ "XCHGB $newval,[$mem]" %}
8067+
format %{ "XCHGB $newval,[$mem]\t# $newval -> byte" %}
80668068
ins_encode %{
80678069
__ xchgb($newval$$Register, $mem$$Address);
8070+
__ narrow_subword_type($newval$$Register, T_BYTE);
80688071
%}
80698072
ins_pipe( pipe_cmpxchg );
80708073
%}
80718074

80728075
instruct xchgS( memory mem, rRegI newval) %{
80738076
match(Set newval (GetAndSetS mem newval));
8074-
format %{ "XCHGW $newval,[$mem]" %}
8077+
format %{ "XCHGW $newval,[$mem]\t# $newval -> short" %}
80758078
ins_encode %{
80768079
__ xchgw($newval$$Register, $mem$$Address);
8080+
__ narrow_subword_type($newval$$Register, T_SHORT);
80778081
%}
80788082
ins_pipe( pipe_cmpxchg );
80798083
%}

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