Skip to content

Commit 89adbf5

Browse files
committed
Merge tag 'jdk-25.0.3+9' into sapmachine25
Added tag jdk-25.0.3+9 for changeset 2fce64f
2 parents 9f85395 + 2fce64f commit 89adbf5

41 files changed

Lines changed: 506 additions & 297 deletions

File tree

Some content is hidden

Large Commits have some content hidden by default. Use the searchbox below for content that may be hidden.

make/conf/version-numbers.conf

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
#
2-
# Copyright (c) 2011, 2025, Oracle and/or its affiliates. All rights reserved.
2+
# Copyright (c) 2011, 2026, Oracle and/or its affiliates. All rights reserved.
33
# DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
44
#
55
# This code is free software; you can redistribute it and/or modify it
@@ -39,4 +39,4 @@ DEFAULT_VERSION_CLASSFILE_MINOR=0
3939
DEFAULT_VERSION_DOCS_API_SINCE=11
4040
DEFAULT_ACCEPTABLE_BOOT_VERSIONS="24 25"
4141
DEFAULT_JDK_SOURCE_TARGET_VERSION=25
42-
DEFAULT_PROMOTED_VERSION_PRE=ea
42+
DEFAULT_PROMOTED_VERSION_PRE=

src/hotspot/cpu/aarch64/aarch64.ad

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -7642,10 +7642,11 @@ instruct bytes_reverse_unsigned_short(iRegINoSp dst, iRegIorL2I src) %{
76427642
match(Set dst (ReverseBytesUS src));
76437643

76447644
ins_cost(INSN_COST);
7645-
format %{ "rev16w $dst, $src" %}
7645+
format %{ "rev16w $dst, $src\t# $dst -> unsigned short" %}
76467646

76477647
ins_encode %{
76487648
__ rev16w(as_Register($dst$$reg), as_Register($src$$reg));
7649+
__ narrow_subword_type(as_Register($dst$$reg), T_CHAR);
76497650
%}
76507651

76517652
ins_pipe(ialu_reg);

src/hotspot/cpu/aarch64/macroAssembler_aarch64.cpp

Lines changed: 11 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2701,6 +2701,17 @@ void MacroAssembler::store_sized_value(Address dst, Register src, size_t size_in
27012701
}
27022702
}
27032703

2704+
void MacroAssembler::narrow_subword_type(Register reg, BasicType bt) {
2705+
assert(is_subword_type(bt), "required");
2706+
switch (bt) {
2707+
case T_BOOLEAN: andw(reg, reg, 1); break;
2708+
case T_BYTE: sxtbw(reg, reg); break;
2709+
case T_CHAR: uxthw(reg, reg); break;
2710+
case T_SHORT: sxthw(reg, reg); break;
2711+
default: ShouldNotReachHere();
2712+
}
2713+
}
2714+
27042715
void MacroAssembler::decrementw(Register reg, int value)
27052716
{
27062717
if (value < 0) { incrementw(reg, -value); return; }

src/hotspot/cpu/aarch64/macroAssembler_aarch64.hpp

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -33,6 +33,7 @@
3333
#include "oops/compressedOops.hpp"
3434
#include "oops/compressedKlass.hpp"
3535
#include "runtime/vm_version.hpp"
36+
#include "utilities/globalDefinitions.hpp"
3637
#include "utilities/powerOfTwo.hpp"
3738

3839
class OopMap;
@@ -723,6 +724,9 @@ class MacroAssembler: public Assembler {
723724
// Support for sign-extension (hi:lo = extend_sign(lo))
724725
void extend_sign(Register hi, Register lo);
725726

727+
// Clean up a subword typed value to the representation in compliance with JVMS §2.3
728+
void narrow_subword_type(Register reg, BasicType bt);
729+
726730
// Load and store values by size and signed-ness
727731
void load_sized_value(Register dst, Address src, size_t size_in_bytes, bool is_signed);
728732
void store_sized_value(Address dst, Register src, size_t size_in_bytes);

src/hotspot/cpu/arm/arm.ad

Lines changed: 5 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -9255,10 +9255,12 @@ instruct bytes_reverse_long(iRegL dst, iRegL src) %{
92559255

92569256
instruct bytes_reverse_unsigned_short(iRegI dst, iRegI src) %{
92579257
match(Set dst (ReverseBytesUS src));
9258-
size(4);
9259-
format %{ "REV16 $dst,$src" %}
9258+
size(8);
9259+
format %{ "REV32 $dst,$src\n\t"
9260+
"LSR $dst,$dst,#16" %}
92609261
ins_encode %{
9261-
__ rev16($dst$$Register, $src$$Register);
9262+
__ rev($dst$$Register, $src$$Register);
9263+
__ mov($dst$$Register, AsmOperand($dst$$Register, lsr, 16));
92629264
%}
92639265
ins_pipe( iload_mem ); // FIXME
92649266
%}

src/hotspot/cpu/ppc/ppc.ad

Lines changed: 17 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -12582,6 +12582,19 @@ instruct countTrailingZerosL_cnttzd(iRegIdst dst, iRegLsrc src) %{
1258212582
ins_pipe(pipe_class_default);
1258312583
%}
1258412584

12585+
// Expand nodes for byte_reverse_int/ushort/short.
12586+
instruct rlwinm(iRegIdst dst, iRegIsrc src, immI16 shift, immI16 mb, immI16 me) %{
12587+
effect(DEF dst, USE src, USE shift, USE mb, USE me);
12588+
predicate(false);
12589+
12590+
format %{ "RLWINM $dst, $src, $shift, $mb, $me" %}
12591+
size(4);
12592+
ins_encode %{
12593+
__ rlwinm($dst$$Register, $src$$Register, $shift$$constant, $mb$$constant, $me$$constant);
12594+
%}
12595+
ins_pipe(pipe_class_default);
12596+
%}
12597+
1258512598
// Expand nodes for byte_reverse_int.
1258612599
instruct insrwi_a(iRegIdst dst, iRegIsrc src, immI16 n, immI16 b) %{
1258712600
effect(DEF dst, USE src, USE n, USE b);
@@ -12738,34 +12751,22 @@ instruct bytes_reverse_long(iRegLdst dst, iRegLsrc src) %{
1273812751
ins_pipe(pipe_class_default);
1273912752
%}
1274012753

12754+
// Need zero extend. Must not use brh only.
1274112755
instruct bytes_reverse_ushort_Ex(iRegIdst dst, iRegIsrc src) %{
1274212756
match(Set dst (ReverseBytesUS src));
12743-
predicate(!UseByteReverseInstructions);
1274412757
ins_cost(2*DEFAULT_COST);
1274512758

1274612759
expand %{
12760+
immI16 imm31 %{ (int) 31 %}
12761+
immI16 imm24 %{ (int) 24 %}
1274712762
immI16 imm16 %{ (int) 16 %}
1274812763
immI16 imm8 %{ (int) 8 %}
1274912764

12750-
urShiftI_reg_imm(dst, src, imm8);
12765+
rlwinm(dst, src, imm24, imm24, imm31);
1275112766
insrwi(dst, src, imm8, imm16);
1275212767
%}
1275312768
%}
1275412769

12755-
instruct bytes_reverse_ushort(iRegIdst dst, iRegIsrc src) %{
12756-
match(Set dst (ReverseBytesUS src));
12757-
predicate(UseByteReverseInstructions);
12758-
ins_cost(DEFAULT_COST);
12759-
size(4);
12760-
12761-
format %{ "BRH $dst, $src" %}
12762-
12763-
ins_encode %{
12764-
__ brh($dst$$Register, $src$$Register);
12765-
%}
12766-
ins_pipe(pipe_class_default);
12767-
%}
12768-
1276912770
instruct bytes_reverse_short_Ex(iRegIdst dst, iRegIsrc src) %{
1277012771
match(Set dst (ReverseBytesS src));
1277112772
predicate(!UseByteReverseInstructions);

src/hotspot/cpu/x86/macroAssembler_x86.cpp

Lines changed: 12 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -55,6 +55,7 @@
5555
#include "runtime/sharedRuntime.hpp"
5656
#include "runtime/stubRoutines.hpp"
5757
#include "utilities/checkedCast.hpp"
58+
#include "utilities/globalDefinitions.hpp"
5859
#include "utilities/macros.hpp"
5960

6061
#ifdef PRODUCT
@@ -2529,6 +2530,17 @@ void MacroAssembler::sign_extend_short(Register reg) {
25292530
movswl(reg, reg); // movsxw
25302531
}
25312532

2533+
void MacroAssembler::narrow_subword_type(Register reg, BasicType bt) {
2534+
assert(is_subword_type(bt), "required");
2535+
switch (bt) {
2536+
case T_BOOLEAN: andl(reg, 1); break;
2537+
case T_BYTE: movsbl(reg, reg); break;
2538+
case T_CHAR: movzwl(reg, reg); break;
2539+
case T_SHORT: movswl(reg, reg); break;
2540+
default: ShouldNotReachHere();
2541+
}
2542+
}
2543+
25322544
void MacroAssembler::testl(Address dst, int32_t imm32) {
25332545
if (imm32 >= 0 && is8bit(imm32)) {
25342546
testb(dst, imm32);

src/hotspot/cpu/x86/macroAssembler_x86.hpp

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -445,6 +445,9 @@ class MacroAssembler: public Assembler {
445445
void sign_extend_short(Register reg);
446446
void sign_extend_byte(Register reg);
447447

448+
// Clean up a subword typed value to the representation in compliance with JVMS §2.3
449+
void narrow_subword_type(Register reg, BasicType bt);
450+
448451
// Division by power of 2, rounding towards 0
449452
void division_with_shift(Register reg, int shift_value);
450453

src/hotspot/cpu/x86/x86.ad

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -10638,6 +10638,7 @@ instruct reinterpretHF2S(rRegI dst, regF src)
1063810638
format %{ "vmovw $dst, $src" %}
1063910639
ins_encode %{
1064010640
__ vmovw($dst$$Register, $src$$XMMRegister);
10641+
__ narrow_subword_type($dst$$Register, T_SHORT);
1064110642
%}
1064210643
ins_pipe(pipe_slow);
1064310644
%}

src/hotspot/cpu/x86/x86_64.ad

Lines changed: 8 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -7939,10 +7939,11 @@ instruct xaddB(memory mem, rRegI newval, rFlagsReg cr) %{
79397939
predicate(!n->as_LoadStore()->result_not_used());
79407940
match(Set newval (GetAndAddB mem newval));
79417941
effect(KILL cr);
7942-
format %{ "xaddb_lock $mem, $newval" %}
7942+
format %{ "xaddb_lock $mem, $newval\t# $newval -> byte" %}
79437943
ins_encode %{
79447944
__ lock();
79457945
__ xaddb($mem$$Address, $newval$$Register);
7946+
__ narrow_subword_type($newval$$Register, T_BYTE);
79467947
%}
79477948
ins_pipe(pipe_cmpxchg);
79487949
%}
@@ -7975,10 +7976,11 @@ instruct xaddS(memory mem, rRegI newval, rFlagsReg cr) %{
79757976
predicate(!n->as_LoadStore()->result_not_used());
79767977
match(Set newval (GetAndAddS mem newval));
79777978
effect(KILL cr);
7978-
format %{ "xaddw_lock $mem, $newval" %}
7979+
format %{ "xaddw_lock $mem, $newval\t# $newval -> short" %}
79797980
ins_encode %{
79807981
__ lock();
79817982
__ xaddw($mem$$Address, $newval$$Register);
7983+
__ narrow_subword_type($newval$$Register, T_SHORT);
79827984
%}
79837985
ins_pipe(pipe_cmpxchg);
79847986
%}
@@ -8057,18 +8059,20 @@ instruct xaddL(memory mem, rRegL newval, rFlagsReg cr) %{
80578059

80588060
instruct xchgB( memory mem, rRegI newval) %{
80598061
match(Set newval (GetAndSetB mem newval));
8060-
format %{ "XCHGB $newval,[$mem]" %}
8062+
format %{ "XCHGB $newval,[$mem]\t# $newval -> byte" %}
80618063
ins_encode %{
80628064
__ xchgb($newval$$Register, $mem$$Address);
8065+
__ narrow_subword_type($newval$$Register, T_BYTE);
80638066
%}
80648067
ins_pipe( pipe_cmpxchg );
80658068
%}
80668069

80678070
instruct xchgS( memory mem, rRegI newval) %{
80688071
match(Set newval (GetAndSetS mem newval));
8069-
format %{ "XCHGW $newval,[$mem]" %}
8072+
format %{ "XCHGW $newval,[$mem]\t# $newval -> short" %}
80708073
ins_encode %{
80718074
__ xchgw($newval$$Register, $mem$$Address);
8075+
__ narrow_subword_type($newval$$Register, T_SHORT);
80728076
%}
80738077
ins_pipe( pipe_cmpxchg );
80748078
%}

0 commit comments

Comments
 (0)