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LoongArch: KVM: Add different length support in loongarch_pch_pic_read()
With function loongarch_pch_pic_read(), currently it is hardcoded length for different registers, and the length comes from exising linux pch_pic driver code. But in theory, all length 1/2/4/8 should be supported for all the registers, here add different length support about register read emulation in function loongarch_pch_pic_read(). Signed-off-by: Bibo Mao <[email protected]> Signed-off-by: Huacai Chen <[email protected]>
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1 file changed

Lines changed: 19 additions & 23 deletions

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arch/loongarch/kvm/intc/pch_pic.c

Lines changed: 19 additions & 23 deletions
Original file line numberDiff line numberDiff line change
@@ -118,55 +118,45 @@ static u32 pch_pic_write_reg(u64 *s, int high, u32 v)
118118

119119
static int loongarch_pch_pic_read(struct loongarch_pch_pic *s, gpa_t addr, int len, void *val)
120120
{
121-
int offset, index, ret = 0;
122-
u32 data = 0;
121+
int ret = 0, offset;
122+
u64 data = 0;
123+
void *ptemp;
123124

124125
offset = addr - s->pch_pic_base;
126+
offset -= offset & 7;
125127

126128
spin_lock(&s->lock);
127129
switch (offset) {
128130
case PCH_PIC_INT_ID_START ... PCH_PIC_INT_ID_END:
129-
*(u64 *)val = s->id.data;
131+
data = s->id.data;
130132
break;
131133
case PCH_PIC_MASK_START ... PCH_PIC_MASK_END:
132-
offset -= PCH_PIC_MASK_START;
133-
index = offset >> 2;
134-
/* read mask reg */
135-
data = pch_pic_read_reg(&s->mask, index);
136-
*(u32 *)val = data;
134+
data = s->mask;
137135
break;
138136
case PCH_PIC_HTMSI_EN_START ... PCH_PIC_HTMSI_EN_END:
139-
offset -= PCH_PIC_HTMSI_EN_START;
140-
index = offset >> 2;
141137
/* read htmsi enable reg */
142-
data = pch_pic_read_reg(&s->htmsi_en, index);
143-
*(u32 *)val = data;
138+
data = s->htmsi_en;
144139
break;
145140
case PCH_PIC_EDGE_START ... PCH_PIC_EDGE_END:
146-
offset -= PCH_PIC_EDGE_START;
147-
index = offset >> 2;
148141
/* read edge enable reg */
149-
data = pch_pic_read_reg(&s->edge, index);
150-
*(u32 *)val = data;
142+
data = s->edge;
151143
break;
152144
case PCH_PIC_AUTO_CTRL0_START ... PCH_PIC_AUTO_CTRL0_END:
153145
case PCH_PIC_AUTO_CTRL1_START ... PCH_PIC_AUTO_CTRL1_END:
154146
/* we only use default mode: fixed interrupt distribution mode */
155-
*(u32 *)val = 0;
156147
break;
157148
case PCH_PIC_ROUTE_ENTRY_START ... PCH_PIC_ROUTE_ENTRY_END:
158149
/* only route to int0: eiointc */
159-
*(u8 *)val = 1;
150+
ptemp = s->route_entry + (offset - PCH_PIC_ROUTE_ENTRY_START);
151+
data = *(u64 *)ptemp;
160152
break;
161153
case PCH_PIC_HTMSI_VEC_START ... PCH_PIC_HTMSI_VEC_END:
162-
offset -= PCH_PIC_HTMSI_VEC_START;
163154
/* read htmsi vector */
164-
data = s->htmsi_vector[offset];
165-
*(u8 *)val = data;
155+
ptemp = s->htmsi_vector + (offset - PCH_PIC_HTMSI_VEC_START);
156+
data = *(u64 *)ptemp;
166157
break;
167158
case PCH_PIC_POLARITY_START ... PCH_PIC_POLARITY_END:
168-
/* we only use defalut value 0: high level triggered */
169-
*(u32 *)val = 0;
159+
data = s->polarity;
170160
break;
171161
case PCH_PIC_INT_IRR_START:
172162
data = s->irr;
@@ -179,6 +169,12 @@ static int loongarch_pch_pic_read(struct loongarch_pch_pic *s, gpa_t addr, int l
179169
}
180170
spin_unlock(&s->lock);
181171

172+
if (ret == 0) {
173+
offset = (addr - s->pch_pic_base) & 7;
174+
data = data >> (offset * 8);
175+
memcpy(val, &data, len);
176+
}
177+
182178
return ret;
183179
}
184180

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