hv: Use architectural ACTLR_EL12 on M2+

Signed-off-by: Asahi Lina <[email protected]>

Author: hoshinolina

proxyclient/m1n1/hv/__init__.py

@@ -50,7 +50,7 @@ class HV(Reloadable):
         MAIR_EL1: MAIR_EL12,
         AMAIR_EL1: AMAIR_EL12,
         CONTEXTIDR_EL1: CONTEXTIDR_EL12,
-        ACTLR_EL1: ACTLR_EL12,
+        # ACTLR_EL1: ACTLR_EL12, # Handled in hv_exc.c, depends on CPU version
         AMX_CONFIG_EL1: AMX_CONFIG_EL12,
         SPRR_CONFIG_EL1: SPRR_CONFIG_EL12,
         SPRR_PPERM_EL1: SPRR_PPERM_EL12,

src/arm_cpu_regs.h

@@ -2,9 +2,10 @@
 
 #include "types.h"
 
-#define SYS_ACTLR_EL1 sys_reg(3, 0, 1, 0, 1)
-#define SYS_ACTLR_EL2 sys_reg(3, 4, 1, 0, 1)
-#define SYS_ACTLR_EL3 sys_reg(3, 6, 1, 0, 1)
+#define SYS_ACTLR_EL1  sys_reg(3, 0, 1, 0, 1)
+#define SYS_ACTLR_EL2  sys_reg(3, 4, 1, 0, 1)
+#define SYS_ACTLR_EL3  sys_reg(3, 6, 1, 0, 1)
+#define SYS_ACTLR_EL12 sys_reg(3, 5, 1, 0, 1)
 
 #define SYS_CNTHCTL_EL2 sys_reg(3, 4, 14, 1, 0)
 // HCR_EL2.E2H == 1

src/chickens.c

@@ -42,6 +42,8 @@ void init_t6021_avalanche(int rev);
 void init_t6031_sawtooth(void);
 void init_t6031_everest(int rev);
 
+bool cpufeat_actlr_el2;
+
 const char *init_cpu(void)
 {
     const char *cpu = "Unknown";
@@ -142,6 +144,9 @@ const char *init_cpu(void)
             break;
     }
 
+    if (part >= MIDR_PART_T8110_BLIZZARD)
+        cpufeat_actlr_el2 = true;
+
     int core = mrs(MPIDR_EL1) & 0xff;
 
     // Unknown, related to SMP?

src/hv_exc.c

@@ -229,7 +229,6 @@ static bool hv_handle_msr_unlocked(struct exc_info *ctx, u64 iss)
         SYSREG_PASS(sys_reg(3, 1, 15, 9, 0));
         SYSREG_PASS(sys_reg(3, 1, 15, 10, 0));
         /* Noisy traps */
-        SYSREG_MAP(SYS_ACTLR_EL1, SYS_IMP_APL_ACTLR_EL12)
         SYSREG_PASS(SYS_IMP_APL_HID4)
         SYSREG_PASS(SYS_IMP_APL_EHID4)
         /* We don't normally trap hese, but if we do, they're noisy */
@@ -272,6 +271,20 @@ static bool hv_handle_msr_unlocked(struct exc_info *ctx, u64 iss)
         SYSREG_PASS(sys_reg(1, 0, 8, 1, 2)) // TLBI ASIDE1OS
         SYSREG_PASS(sys_reg(1, 0, 8, 5, 1)) // TLBI RVAE1OS
 
+        case SYSREG_ISS(SYS_ACTLR_EL1):
+            if (is_read) {
+                if (cpufeat_actlr_el2)
+                    regs[rt] = mrs(SYS_ACTLR_EL12);
+                else
+                    regs[rt] = mrs(SYS_IMP_APL_ACTLR_EL12);
+            } else {
+                if (cpufeat_actlr_el2)
+                    msr(SYS_ACTLR_EL12, regs[rt]);
+                else
+                    msr(SYS_IMP_APL_ACTLR_EL12, regs[rt]);
+            }
+            return true;
+
         case SYSREG_ISS(SYS_IMP_APL_IPI_SR_EL1):
             if (is_read)
                 regs[rt] = PERCPU(ipi_pending) ? IPI_SR_PENDING : 0;

src/utils.h

@@ -429,6 +429,7 @@ struct vector_args {
 };
 
 extern u32 board_id, chip_id;
+extern bool cpufeat_actlr_el2;
 
 extern struct vector_args next_stage;
 

tools/apple_regs.json

@@ -276,7 +276,7 @@
     {"index": 0, "name": "SPRR_AMRANGE_EL2",            "fullname": "SPRR AM Range (EL2)",                                          "enc": [3, 6, 15, 14, 3 ], "width": 64},
     {"index": 0, "name": "VMKEYLO_EL2",                 "fullname": "Pointer Authentication VM Machine Key Low",                    "enc": [3, 6, 15, 14, 4 ], "width": 64},
     {"index": 0, "name": "VMKEYHI_EL2",                 "fullname": "Pointer Authentication VM Machine Key High",                   "enc": [3, 6, 15, 14, 5 ], "width": 64},
-    {"index": 0, "name": "ACTLR_EL12",                  "fullname": "Auxiliary Control Register (EL12)",                            "enc": [3, 6, 15, 14, 6 ], "width": 64},
+    {"index": 0, "name": "ACTLR_EL12_PRE",              "fullname": "Auxiliary Control Register (EL12, pre-spec)",                  "enc": [3, 6, 15, 14, 6 ], "width": 64},
     {"index": 0, "name": "APSTS_EL12",                  "fullname": "Pointer Authentication Status (EL12)",                         "enc": [3, 6, 15, 14, 7 ], "width": 64},
     {"index": 0, "name": "APCTL_EL12",                  "fullname": "Pointer Authentication Control (EL12)",                        "enc": [3, 6, 15, 15, 0 ], "width": 64},
     {"index": 0, "name": "GXF_CONFIG_EL12",             "fullname": "GXF Configuration Register (EL12)",                            "enc": [3, 6, 15, 15, 1 ], "width": 64},
@@ -332,5 +332,6 @@
             {"name": "TRAP_PM",                         "msb": 57, "lsb": 57},
             {"name": "TRAP_UPM",                        "msb": 58, "lsb": 58},
             {"name": "TRAP_s3_1z7_c15_cx_3",            "msb": 59, "lsb": 59}
-        ]}]}
+        ]}]},
+    {"index": 0, "name": "ACTLR_EL12",                  "fullname": "Auxiliary Control Register (EL12)",                            "enc": [3, 5, 1, 0, 1 ], "width": 64}
 ]