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arm64: dts: apple: Add NVMe nodes to M3 (t8122) device tree
On Apple Silicon, NVMe communication is mediated by a coprocessor known as the ANS, and protected by its own IOMMU known as the SART. Add the following nodes to the M3 (t8122) device tree: - Mailbox for the ANS coprocessor - SART (IOMMU for the ANS coprocessor) - The NVMe / ANS coprocessor itself Signed-off-by: Michael Reeves <[email protected]>
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arch/arm64/boot/dts/apple/t8122.dtsi

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apple,helper-cpu = <&mtp>;
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};
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};
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ans_mbox: mbox@309408000 {
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compatible = "apple,t8122-asc-mailbox", "apple,asc-mailbox-v4";
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reg = <0x3 0x09408000 0x0 0x4000>;
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interrupt-parent = <&aic>;
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interrupts = <AIC_IRQ 730 IRQ_TYPE_LEVEL_HIGH>,
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<AIC_IRQ 731 IRQ_TYPE_LEVEL_HIGH>,
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<AIC_IRQ 732 IRQ_TYPE_LEVEL_HIGH>,
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<AIC_IRQ 733 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "send-empty", "send-not-empty",
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"recv-empty", "recv-not-empty";
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#mbox-cells = <0>;
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power-domains = <&ps_ans>;
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};
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sart: sart@30dc50000 {
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compatible = "apple,t8122-sart", "apple,t6000-sart";
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reg = <0x3 0x0dc50000 0x0 0x10000>;
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power-domains = <&ps_ans>;
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};
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nvme: nvme@30dcc0000 {
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compatible = "apple,t8122-nvme-ans2", "apple,nvme-ans2";
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reg = <0x3 0x0dcc0000 0x0 0x60000>,
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<0x3 0x09400000 0x0 0x4000>;
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reg-names = "nvme", "ans";
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interrupt-parent = <&aic>;
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interrupts = <AIC_IRQ 742 IRQ_TYPE_LEVEL_HIGH>;
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mboxes = <&ans_mbox>;
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apple,sart = <&sart>;
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power-domains = <&ps_ans>, <&ps_apcie_phy_sw>;
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power-domain-names = "ans", "apcie_phy_sw";
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resets = <&ps_ans>;
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};
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};
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};
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