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Merge pull request #228 from 404Setup/bolt-optimize-offset24-3244999817098573056
⚡ Bolt: Optimize decompression for offset 24
2 parents 288d3a7 + 9a81fcb commit f144779

2 files changed

Lines changed: 37 additions & 10 deletions

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.jules/bolt.md

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Original file line numberDiff line numberDiff line change
@@ -23,3 +23,7 @@
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## 2026-06-04 - [Adler32 AVX2 VNNI Optimization]
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**Learning:** Optimizing `adler32_x86_avx2_vnni` by unrolling to 256 bytes (8 accumulators) yielded a 44% throughput improvement for 256-byte inputs. However, holding intermediate `u` vectors for batch reduction caused register spilling (17+ registers needed).
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**Action:** To fit 8 accumulators within 16 AVX2 registers, interleave the reduction of temporary vectors (`u`) with the accumulation steps (`v_s2`), allowing registers to be freed earlier. Merging the global accumulator into a local one and generating `v_zero` on-the-fly also saved registers.
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## 2026-06-04 - [Vector Precomputation vs Alignr Chain]
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**Learning:** For overlapping patterns where offset is a multiple of 8 (e.g., offset 24), breaking the `alignr` dependency chain by precomputing all vectors in the cycle (LCM of offset and vector size) allowed for effective loop unrolling. This yielded a 32% throughput improvement (7.7 GiB/s -> 10.2 GiB/s) by increasing ILP compared to the serial dependency of iterative `alignr`.
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**Action:** When optimizing decompression loops for specific offsets, determine if the pattern cycle is short enough to precompute fully. If so, prefer storing precomputed vectors in an unrolled loop over calculating the next vector from the previous one.

src/decompress/x86.rs

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@@ -709,24 +709,47 @@ pub unsafe fn decompress_bmi2(
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let mut copied = 16;
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// src[16] is dest[-8]. We need dest[-8..-1] (8 bytes).
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// Avoid reading dest[0] by reading two u32s.
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// v0 at dest[-8..-5], v1 at dest[-4..-1].
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let v0 =
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// v_part1 at dest[-8..-5], v_part2 at dest[-4..-1].
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let v_part1 =
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std::ptr::read_unaligned(src.add(16) as *const u32);
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let v1 =
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let v_part2 =
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std::ptr::read_unaligned(src.add(20) as *const u32);
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let val = (v0 as u64) | ((v1 as u64) << 32);
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let v_temp = _mm_cvtsi64_si128(val as i64);
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let mut v_align = _mm_slli_si128(v_temp, 8);
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let mut v_prev = v;
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let val = (v_part1 as u64) | ((v_part2 as u64) << 32);
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let v_tail = _mm_cvtsi64_si128(val as i64);
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let v0 = v;
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// v1 = dest[16..32] = dest[-8..0] | dest[0..8] = v_tail | v0_low
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let v1 = _mm_unpacklo_epi64(v_tail, v0);
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// v2 = dest[32..48] = dest[8..16] | dest[16..24] = v0_high | v_tail
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// alignr(v_tail, v0, 8) takes v0[8..16] and v_tail[0..8]
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let v2 = _mm_alignr_epi8(v_tail, v0, 8);
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while copied + 48 <= length {
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_mm_storeu_si128(
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out_next.add(copied) as *mut __m128i,
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v1,
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);
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_mm_storeu_si128(
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out_next.add(copied + 16) as *mut __m128i,
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v2,
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);
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_mm_storeu_si128(
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out_next.add(copied + 32) as *mut __m128i,
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v0,
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);
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copied += 48;
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}
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while copied + 16 <= length {
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let v_next = _mm_alignr_epi8(v_prev, v_align, 8);
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let idx = (copied % 48) / 16;
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let v_next = match idx {
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1 => v1,
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2 => v2,
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_ => v0,
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};
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_mm_storeu_si128(
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out_next.add(copied) as *mut __m128i,
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v_next,
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);
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v_align = v_prev;
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v_prev = v_next;
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copied += 16;
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}
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if copied < length {

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